diff --git a/ChangeLog b/ChangeLog index 7286e8d826..cc5f60f8eb 100644 --- a/ChangeLog +++ b/ChangeLog @@ -2952,4 +2952,8 @@ Xplorer board. This is just to facilitate testing of the LPC43xx port but will, with any luck, become proper board support for that board. + * arch/arm/src/lm3s/lm3s_syscontrol.c: Fix an optimization related problem + by adding a volatile qualifier to a timing loop. Oddly, the consequence + of the bug is that when debug was off, the LM3S platform too a long time + to boot. It now boots rapidly whether debug is on or off. diff --git a/arch/arm/src/lm3s/lm3s_syscontrol.c b/arch/arm/src/lm3s/lm3s_syscontrol.c index f7a9528c1f..bd67a6ae19 100644 --- a/arch/arm/src/lm3s/lm3s_syscontrol.c +++ b/arch/arm/src/lm3s/lm3s_syscontrol.c @@ -110,7 +110,7 @@ static inline void lm3s_oscdelay(uint32_t rcc, uint32_t rcc2) * current clock rate is very slow. */ - uint32_t delay = FAST_OSCDELAY; + uint32_t delay = FAST_OSCDELAY; /* Are we currently using RCC2? */ @@ -150,7 +150,7 @@ static inline void lm3s_oscdelay(uint32_t rcc, uint32_t rcc2) static inline void lm3s_plllock(void) { - uint32_t delay; + volatile uint32_t delay; /* Loop until the lock is achieved or until a timeout occurs */ diff --git a/configs/ekk-lm3s9b96/README.txt b/configs/ekk-lm3s9b96/README.txt index 3b1da6d2fd..9c4e1ba695 100644 --- a/configs/ekk-lm3s9b96/README.txt +++ b/configs/ekk-lm3s9b96/README.txt @@ -268,7 +268,7 @@ Stellaris EKK-LM3S9B96 Evaluation Kit Configuration Options CONFIG_DRAM_SIZE - Describes the installed DRAM (SRAM in this case): - CONFIG_DRAM_SIZE=0x00010000 (64Kb) + CONFIG_DRAM_SIZE=0x00018000 (96Kb) CONFIG_DRAM_START - The start address of installed DRAM diff --git a/configs/ekk-lm3s9b96/src/up_boot.c b/configs/ekk-lm3s9b96/src/up_boot.c index 95f8cba484..528d150e12 100644 --- a/configs/ekk-lm3s9b96/src/up_boot.c +++ b/configs/ekk-lm3s9b96/src/up_boot.c @@ -72,7 +72,7 @@ void lm3s_boardinitialize(void) { - /* Configure SPI chip selects if 1) SSI is not disabled, and 2) the weak function + /* Configure chip selects if 1) SSI is not disabled, and 2) the weak function * lm3s_ssiinitialize() has been brought into the link. */ diff --git a/configs/ekk-lm3s9b96/src/up_ssi.c b/configs/ekk-lm3s9b96/src/up_ssi.c index 879a6669d2..2fe3b81c86 100644 --- a/configs/ekk-lm3s9b96/src/up_ssi.c +++ b/configs/ekk-lm3s9b96/src/up_ssi.c @@ -99,13 +99,13 @@ * Name: lm3s_ssiinitialize * * Description: - * Called to configure SPI chip select GPIO pins for the LM3S6965 Eval Kit. + * Called to configure chip select GPIO pins for the LM3S9B96 Eval board. * ************************************************************************************/ void weak_function lm3s_ssiinitialize(void) { - /* Configure the SPI CS GPIO */ + /* Configure the CS GPIO */ #if 0 ssi_dumpgpio("lm3s_ssiinitialize() Entry"); ssi_dumpgpio("lm3s_ssiinitialize() Exit");