diff --git a/arch/x86/include/i486/irq.h b/arch/x86/include/i486/irq.h index a1150f1e20..8cf0fed130 100644 --- a/arch/x86/include/i486/irq.h +++ b/arch/x86/include/i486/irq.h @@ -171,7 +171,7 @@ struct xcptcontext /* Register save area */ - uint32_t regs[XCPTCONTEXT_REGS]; + uint32_t regs[XCPTCONTEXT_REGS]; }; #endif @@ -254,7 +254,7 @@ static inline void up_irq_restore(irqstate_t flags) } static inline void system_call3(unsigned int nbr, uintptr_t parm1, - uintptr_t parm2, uintptr_t parm3) + uintptr_t parm2, uintptr_t parm3) { /* To be provided */ } diff --git a/arch/x86/src/common/up_allocateheap.c b/arch/x86/src/common/up_allocateheap.c index f1d942ec1e..35aa50c1b4 100644 --- a/arch/x86/src/common/up_allocateheap.c +++ b/arch/x86/src/common/up_allocateheap.c @@ -68,6 +68,6 @@ void up_allocate_heap(FAR void **heap_start, size_t *heap_size) { board_autoled_on(LED_HEAPALLOCATE); - *heap_start = (FAR void*)g_idle_topstack; + *heap_start = (FAR void *)g_idle_topstack; *heap_size = CONFIG_RAM_END - g_idle_topstack; } diff --git a/arch/x86/src/common/up_internal.h b/arch/x86/src/common/up_internal.h index d362a065bc..6659f5cd02 100644 --- a/arch/x86/src/common/up_internal.h +++ b/arch/x86/src/common/up_internal.h @@ -96,9 +96,9 @@ typedef void (*up_vector_t)(void); extern volatile uint32_t *g_current_regs; -/* This is the beginning of heap as provided from up_head.S. This is the first - * address in DRAM after the loaded program+bss+idle stack. The end of the - * heap is CONFIG_RAM_END +/* This is the beginning of heap as provided from up_head.S. This is the + * first address in DRAM after the loaded program+bss+idle stack. The end + * of the heap is CONFIG_RAM_END */ extern uint32_t g_idle_topstack; @@ -109,14 +109,14 @@ extern uint32_t g_idle_topstack; extern uint32_t g_intstackbase; #endif -/* These 'addresses' of these values are setup by the linker script. They are - * not actual uint32_t storage locations! They are only used meaningfully in the - * following way: +/* These 'addresses' of these values are setup by the linker script. They + * are not actual uint32_t storage locations! They are only used meaningfully + * in the following way: * * - The linker script defines, for example, the symbol_sdata. * - The declareion extern uint32_t _sdata; makes C happy. C will believe - * that the value _sdata is the address of a uint32_t variable _data (it is - * not!). + * that the value _sdata is the address of a uint32_t variable _data + * (it is not!). * - We can recoved the linker value then by simply taking the address of * of _data. like: uint32_t *pdata = &_sdata; */ @@ -135,7 +135,7 @@ extern uint32_t _ebss; /* End+1 of .bss */ ****************************************************************************/ /**************************************************************************** - * Public Functions + * Public Functions Prototypes ****************************************************************************/ #ifndef __ASSEMBLY__ diff --git a/arch/x86/src/common/up_interruptcontext.c b/arch/x86/src/common/up_interruptcontext.c index 88184f0904..4b1f7a9e40 100644 --- a/arch/x86/src/common/up_interruptcontext.c +++ b/arch/x86/src/common/up_interruptcontext.c @@ -53,5 +53,5 @@ bool up_interrupt_context(void) { - return g_current_regs != NULL; + return g_current_regs != NULL; } diff --git a/arch/x86/src/common/up_udelay.c b/arch/x86/src/common/up_udelay.c index 75412a902e..acd2978d7c 100644 --- a/arch/x86/src/common/up_udelay.c +++ b/arch/x86/src/common/up_udelay.c @@ -85,6 +85,7 @@ void up_udelay(useconds_t microseconds) for (i = 0; i < CONFIG_BOARD_LOOPSPERMSEC; i++) { } + microseconds -= 1000; } @@ -93,6 +94,7 @@ void up_udelay(useconds_t microseconds) for (i = 0; i < CONFIG_BOARD_LOOPSPER100USEC; i++) { } + microseconds -= 100; } @@ -101,6 +103,7 @@ void up_udelay(useconds_t microseconds) for (i = 0; i < CONFIG_BOARD_LOOPSPER10USEC; i++) { } + microseconds -= 10; } @@ -109,6 +112,7 @@ void up_udelay(useconds_t microseconds) for (i = 0; i < CONFIG_BOARD_LOOPSPERUSEC; i++) { } + microseconds--; } } diff --git a/arch/x86/src/i486/up_irq.c b/arch/x86/src/i486/up_irq.c index e9dd1a5969..ab8f575939 100644 --- a/arch/x86/src/i486/up_irq.c +++ b/arch/x86/src/i486/up_irq.c @@ -96,25 +96,27 @@ static void up_remappic(void) idt_outb(PIC1_IMR_ALL, PIC1_IMR); idt_outb(PIC2_IMR_ALL, PIC2_IMR); - /* If the PIC has been reset, it must be initialized with 2 to 4 Initialization - * Command Words (ICW) before it will accept and process Interrupt Requests. The - * following outlines the four possible Initialization Command Words. + /* If the PIC has been reset, it must be initialized with 2 to 4 + * Initialization Command Words (ICW) before it will accept and process + * Interrupt Requests. The following outlines the four possible + * Initialization Command Words. */ /* Remap the irq table for primary: * * ICW1 - We will be sending ICW4 * ICW2 - Address - * ICW3 */ + * ICW3 + */ - idt_outb(PIC_ICW1_ICW4|PIC_ICW1_ICW1, PIC1_ICW1); + idt_outb(PIC_ICW1_ICW4 | PIC_ICW1_ICW1, PIC1_ICW1); idt_outb(0x20, PIC1_ICW2); idt_outb(PIC1_ICW3_IRQ2, PIC1_ICW3); idt_outb(PIC_ICW4_808xMODE, PIC1_ICW4); /* Remap irq for slave */ - idt_outb(PIC_ICW1_ICW4|PIC_ICW1_ICW1, PIC2_ICW1); + idt_outb(PIC_ICW1_ICW4 | PIC_ICW1_ICW1, PIC2_ICW1); idt_outb(0x28, PIC2_ICW2); idt_outb(PIC_ICW3_SID2, PIC2_ICW3); idt_outb(PIC_ICW4_808xMODE, PIC2_ICW4); @@ -144,8 +146,8 @@ static void up_idtentry(unsigned int index, uint32_t base, uint16_t sel, entry->sel = sel; entry->zero = 0; - /* We must uncomment the OR below when we get to using user-mode. It sets the - * interrupt gate's privilege level to 3. + /* We must uncomment the OR below when we get to using user-mode. It sets + * the interrupt gate's privilege level to 3. */ entry->flags = flags /* | 0x60 */; diff --git a/arch/x86/src/i486/up_savestate.c b/arch/x86/src/i486/up_savestate.c index 0603f196fa..abc60908e9 100644 --- a/arch/x86/src/i486/up_savestate.c +++ b/arch/x86/src/i486/up_savestate.c @@ -46,6 +46,7 @@ /**************************************************************************** * Public Functions ****************************************************************************/ + /**************************************************************************** * Name: up_savestate * @@ -65,7 +66,7 @@ void up_savestate(uint32_t *regs) /* First, just copy all of the registers */ - up_copystate(regs, (uint32_t*)g_current_regs); + up_copystate(regs, (uint32_t *)g_current_regs); /* The RES_SP and REG_SS values will not be saved by the interrupt handling * logic if there is no change in privilege level. In that case, we will @@ -84,8 +85,8 @@ void up_savestate(uint32_t *regs) { /* No priority change, SP and SS are not present in the stack frame. * - * The value saved in the REG_ESP will be the stackpointer value prior to - * the execution of the PUSHA. It will point at REG_IRQNO. + * The value saved in the REG_ESP will be the stackpointer value prior + * to the execution of the PUSHA. It will point at REG_IRQNO. */ regs[REG_SP] = g_current_regs[REG_ESP] + 4*BOTTOM_NOPRIO; diff --git a/arch/x86/src/qemu/chip.h b/arch/x86/src/qemu/chip.h index f0628d2ae1..a3e9aeb334 100644 --- a/arch/x86/src/qemu/chip.h +++ b/arch/x86/src/qemu/chip.h @@ -27,10 +27,6 @@ #include -/************************************************************************************ - * Pre-processor Definitions - ************************************************************************************/ - /* Get customizations for each supported QEMU emulation */ #ifdef CONFIG_ARCH_CHIP_QEMU @@ -44,6 +40,10 @@ #include "qemu_memorymap.h" +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ + /************************************************************************************ * Public Types ************************************************************************************/ @@ -53,7 +53,7 @@ ************************************************************************************/ /************************************************************************************ - * Public Functions + * Public Functions Prototypes ************************************************************************************/ #endif /* __ARCH_X86_SRC_QEMU_QEMU_CHIP_H */ diff --git a/arch/x86/src/qemu/qemu.h b/arch/x86/src/qemu/qemu.h index fc1df73584..21f074a5c1 100644 --- a/arch/x86/src/qemu/qemu.h +++ b/arch/x86/src/qemu/qemu.h @@ -1,4 +1,4 @@ -/************************************************************************************ +/**************************************************************************** * arch/x86/src/qemu/qemu.h * * Licensed to the Apache Software Foundation (ASF) under one or more @@ -16,14 +16,14 @@ * License for the specific language governing permissions and limitations * under the License. * - ************************************************************************************/ + ****************************************************************************/ #ifndef __ARCH_X86_SRC_QEMU_QEMU_H #define __ARCH_X86_SRC_QEMU_QEMU_H -/************************************************************************************ +/**************************************************************************** * Included Files - ************************************************************************************/ + ****************************************************************************/ #include #include @@ -35,25 +35,25 @@ #include "up_internal.h" #include "chip.h" -/************************************************************************************ +/**************************************************************************** * Pre-processor Definitions - ************************************************************************************/ + ****************************************************************************/ -/* Configuration ********************************************************************/ +/* Configuration ************************************************************/ -/************************************************************************************ +/**************************************************************************** * Public Types - ************************************************************************************/ + ****************************************************************************/ -/************************************************************************************ +/**************************************************************************** * Inline Functions - ************************************************************************************/ + ****************************************************************************/ #ifndef __ASSEMBLY__ -/************************************************************************************ +/**************************************************************************** * Public Data - ************************************************************************************/ + ****************************************************************************/ #undef EXTERN #if defined(__cplusplus) @@ -64,43 +64,45 @@ extern "C" #define EXTERN extern #endif -/************************************************************************************ +/**************************************************************************** * Public Function Prototypes - ************************************************************************************/ + ****************************************************************************/ struct spi_dev_s; /* Forward reference */ -/************************************************************************************ +/**************************************************************************** * Name: i486_clockconfig * * Description: - * Called to initialize the i486. This does whatever setup is needed to put the - * MCU in a usable state. This includes the initialization of clocking using the - * settings in board.h. + * Called to initialize the i486. This does whatever setup is needed to + * put the MCU in a usable state. This includes the initialization of + * clocking using the settings in board.h. * - ************************************************************************************/ + ****************************************************************************/ void i486_clockconfig(void); -/************************************************************************************ +/**************************************************************************** * Name: i486_lowsetup * * Description: - * Called at the very beginning of _start. Performs low level initialization - * including setup of the console UART. This UART done early so that the serial - * console is available for debugging very early in the boot sequence. + * Called at the very beginning of _start. Performs low level + * initialization including setup of the console UART. This UART done + * early so that the serial console is available for debugging very early + * in the boot sequence. * - ************************************************************************************/ + ****************************************************************************/ void i486_lowsetup(void); -/************************************************************************************ +/**************************************************************************** * Name: i486_gpioirqinitialize * * Description: - * Initialize logic to support a second level of interrupt decoding for GPIO pins. + * Initialize logic to support a second level of interrupt decoding for + * GPIO pins. * - ************************************************************************************/ + ****************************************************************************/ #ifdef CONFIG_QEMU_GPIOIRQ void i486_gpioirqinitialize(void); @@ -108,43 +110,43 @@ void i486_gpioirqinitialize(void); # define i486_gpioirqinitialize() #endif -/************************************************************************************ +/**************************************************************************** * Name: i486_configgpio * * Description: * Configure a GPIO pin based on bit-encoded description of the pin. * - ************************************************************************************/ + ****************************************************************************/ int i486_configgpio(uint16_t cfgset); -/************************************************************************************ +/**************************************************************************** * Name: i486_gpiowrite * * Description: * Write one or zero to the selected GPIO pin * - ************************************************************************************/ + ****************************************************************************/ void i486_gpiowrite(uint16_t pinset, bool value); -/************************************************************************************ +/**************************************************************************** * Name: i486_gpioread * * Description: * Read one or zero from the selected GPIO pin * - ************************************************************************************/ + ****************************************************************************/ bool i486_gpioread(uint16_t pinset); -/************************************************************************************ +/**************************************************************************** * Name: i486_gpioirqenable * * Description: * Enable the interrupt for specified GPIO IRQ * - ************************************************************************************/ + ****************************************************************************/ #ifdef CONFIG_QEMU_GPIOIRQ void i486_gpioirqenable(int irq); @@ -152,13 +154,13 @@ void i486_gpioirqenable(int irq); # define i486_gpioirqenable(irq) #endif -/************************************************************************************ +/**************************************************************************** * Name: i486_gpioirqdisable * * Description: * Disable the interrupt for specified GPIO IRQ * - ************************************************************************************/ + ****************************************************************************/ #ifdef CONFIG_QEMU_GPIOIRQ void i486_gpioirqdisable(int irq); @@ -166,13 +168,14 @@ void i486_gpioirqdisable(int irq); # define i486_gpioirqdisable(irq) #endif -/************************************************************************************ +/**************************************************************************** * Function: i486_dumpgpio * * Description: - * Dump all GPIO registers associated with the base address of the provided pinset. + * Dump all GPIO registers associated with the base address of the provided + * pinset. * - ************************************************************************************/ + ****************************************************************************/ #ifdef CONFIG_DEBUG_GPIO_INFO int i486_dumpgpio(uint16_t pinset, const char *msg); @@ -196,37 +199,39 @@ int i486_dumpgpio(uint16_t pinset, const char *msg); FAR struct spi_dev_s *i486_spibus_initialize(int port); -/************************************************************************************ +/**************************************************************************** * Name: i486_spi/ssp0/ssp1select, i486_spi/ssp0/ssp1status, and * i486_spi/ssp0/ssp1cmddata * * Description: - * These external functions must be provided by board-specific logic. They are - * implementations of the select, status, and cmddata methods of the SPI interface - * defined by struct spi_ops_s (see include/nuttx/spi/spi.h). All other methods - * including i486_spibus_initialize()) are provided by common i486 logic. To use - * this common SPI logic on your board: + * These external functions must be provided by board-specific logic. They + * are implementations of the select, status, and cmddata methods of the + * SPI interface defined by struct spi_ops_s (see include/nuttx/spi/spi.h). + * All other methods including i486_spibus_initialize()) are provided by + * common i486 logic. To use this common SPI logic on your board: * - * 1. Provide logic in i486_boardinitialize() to configure SPI/SSP chip select - * pins. - * 2. Provide i486_spi/ssp0/ssp1select() and i486_spi/ssp0/ssp1status() functions - * in your board-specific logic. These functions will perform chip selection - * and status operations using GPIOs in the way your board is configured. + * 1. Provide logic in i486_boardinitialize() to configure SPI/SSP chip + * select pins. + * 2. Provide i486_spi/ssp0/ssp1select() and i486_spi/ssp0/ssp1status() + * functions in your board-specific logic. These functions will perform + * chip selection and status operations using GPIOs in the way your + * board is configured. * 2. If CONFIG_SPI_CMDDATA is defined in the NuttX configuration, provide - * i486_spi/ssp0/ssp1cmddata() functions in your board-specific logic. These - * functions will perform cmd/data selection operations using GPIOs in the way - * your board is configured. + * i486_spi/ssp0/ssp1cmddata() functions in your board-specific logic. + * These functions will perform cmd/data selection operations using + * GPIOs in the way your board is configured. * 3. Add a call to i486_spibus_initialize() in your low level application * initialization logic - * 4. The handle returned by i486_spibus_initialize() may then be used to bind the - * SPI driver to higher level logic (e.g., calling + * 4. The handle returned by i486_spibus_initialize() may then be used to + * bind the SPI driver to higher level logic (e.g., calling * mmcsd_spislotinitialize(), for example, will bind the SPI driver to * the SPI MMC/SD driver). * - ************************************************************************************/ + ****************************************************************************/ #ifdef CONFIG_I486_SPI -void i486_spiselect(FAR struct spi_dev_s *dev, uint32_t devid, bool selected); +void i486_spiselect(FAR struct spi_dev_s *dev, + uint32_t devid, bool selected); uint8_t i486_spistatus(FAR struct spi_dev_s *dev, uint32_t devid); #ifdef CONFIG_SPI_CMDDATA int i486_spicmddata(FAR struct spi_dev_s *dev, uint32_t devid, bool cmd); diff --git a/arch/x86/src/qemu/qemu_handlers.c b/arch/x86/src/qemu/qemu_handlers.c index f88f38c372..32030013f5 100644 --- a/arch/x86/src/qemu/qemu_handlers.c +++ b/arch/x86/src/qemu/qemu_handlers.c @@ -101,7 +101,7 @@ static uint32_t *common_handler(int irq, uint32_t *regs) #ifdef CONFIG_ARCH_FPU /* Restore floating point registers */ - up_restorefpu((uint32_t*)g_current_regs); + up_restorefpu((uint32_t *)g_current_regs); #endif #ifdef CONFIG_ARCH_ADDRENV @@ -122,7 +122,7 @@ static uint32_t *common_handler(int irq, uint32_t *regs) * switch occurred during interrupt processing. */ - regs = (uint32_t*)g_current_regs; + regs = (uint32_t *)g_current_regs; /* Set g_current_regs to NULL to indicate that we are no longer in an * interrupt handler. @@ -149,8 +149,8 @@ uint32_t *isr_handler(uint32_t *regs) { #ifdef CONFIG_SUPPRESS_INTERRUPTS board_autoled_on(LED_INIRQ); - PANIC(); /* Doesn't return */ - return regs; /* To keep the compiler happy */ + PANIC(); /* Doesn't return */ + return regs; /* To keep the compiler happy */ #else uint32_t *ret; @@ -175,8 +175,8 @@ uint32_t *irq_handler(uint32_t *regs) { #ifdef CONFIG_SUPPRESS_INTERRUPTS board_autoled_on(LED_INIRQ); - PANIC(); /* Doesn't return */ - return regs; /* To keep the compiler happy */ + PANIC(); /* Doesn't return */ + return regs; /* To keep the compiler happy */ #else uint32_t *ret; int irq; diff --git a/arch/x86/src/qemu/qemu_keypad.c b/arch/x86/src/qemu/qemu_keypad.c index e97994502e..aa410005c8 100644 --- a/arch/x86/src/qemu/qemu_keypad.c +++ b/arch/x86/src/qemu/qemu_keypad.c @@ -230,7 +230,7 @@ static const unsigned char g_kdbus[128] = KEY_F1, /* 59 - F1 key ... > */ KEY_F2, KEY_F3, KEY_F4, KEY_F5, KEY_F6, KEY_F7, KEY_F8, KEY_F9, KEY_F10, /* < ... F10 */ - 0, /* 69 - Num lock*/ + 0, /* 69 - Num lock */ 0, /* Scroll Lock */ KEY_HOME, /* Home key */ KEY_UP, /* Up Arrow */ @@ -240,7 +240,7 @@ static const unsigned char g_kdbus[128] = 0, KEY_RIGHT, /* Right Arrow */ '+', - KEY_END, /* 79 - End key*/ + KEY_END, /* 79 - End key */ KEY_DOWN, /* Down Arrow */ KEY_PAGEDOWN, /* Page Down */ KEY_INSERT, /* Insert Key */ @@ -306,6 +306,7 @@ static ssize_t keypad_read(struct file *filep, FAR char *buf, size_t buflen) /**************************************************************************** * Public Functions ****************************************************************************/ + /**************************************************************************** * Name: qemu_keypad * diff --git a/arch/x86/src/qemu/qemu_keypad.h b/arch/x86/src/qemu/qemu_keypad.h index 1316800b28..98a58040f5 100644 --- a/arch/x86/src/qemu/qemu_keypad.h +++ b/arch/x86/src/qemu/qemu_keypad.h @@ -40,8 +40,9 @@ ****************************************************************************/ /**************************************************************************** - * Public Functions + * Public Functions Prototypes ****************************************************************************/ + /**************************************************************************** * Name: qemu_keypad * diff --git a/arch/x86/src/qemu/qemu_lowputc.c b/arch/x86/src/qemu/qemu_lowputc.c index 73d10680e0..668a400ae3 100644 --- a/arch/x86/src/qemu/qemu_lowputc.c +++ b/arch/x86/src/qemu/qemu_lowputc.c @@ -80,9 +80,9 @@ void up_lowputc(char ch) { /* Wait until the Transmitter Holding Register (THR) is empty. */ - while ((inb(COM1_PORT+COM_LSR) & LSR_THRE) == 0); + while ((inb(COM1_PORT + COM_LSR) & LSR_THRE) == 0); - /* Then output the character to the THR*/ + /* Then output the character to the THR */ - outb(ch, COM1_PORT+COM_THR); + outb(ch, COM1_PORT + COM_THR); } diff --git a/arch/x86/src/qemu/qemu_lowsetup.c b/arch/x86/src/qemu/qemu_lowsetup.c index 3f28f045cc..7150c0bc8f 100644 --- a/arch/x86/src/qemu/qemu_lowsetup.c +++ b/arch/x86/src/qemu/qemu_lowsetup.c @@ -90,7 +90,7 @@ static void up_gdtinit(void) gdt_ptr.limit = (sizeof(struct gdt_entry_s) * 5) - 1; gdt_ptr.base = (uint32_t)gdt_entries; - gdt_flush((uint32_t )&gdt_ptr); + gdt_flush((uint32_t)&gdt_ptr); } /**************************************************************************** diff --git a/arch/x86/src/qemu/qemu_memorymap.h b/arch/x86/src/qemu/qemu_memorymap.h index 1a5ad64bf5..02b08191a1 100644 --- a/arch/x86/src/qemu/qemu_memorymap.h +++ b/arch/x86/src/qemu/qemu_memorymap.h @@ -46,7 +46,7 @@ ************************************************************************************/ /************************************************************************************ - * Public Functions + * Public Functions Prototypes ************************************************************************************/ #endif /* __ARCH_X86_SRC_QEMU_QEMU_MEMORYMAP_H */ diff --git a/arch/x86/src/qemu/qemu_serial.c b/arch/x86/src/qemu/qemu_serial.c index 687ecced5c..bddaae2549 100644 --- a/arch/x86/src/qemu/qemu_serial.c +++ b/arch/x86/src/qemu/qemu_serial.c @@ -56,7 +56,8 @@ uart_datawidth_t uart_getreg(uart_addrwidth_t base, unsigned int offset) return inb(base + offset); } -void uart_putreg(uart_addrwidth_t base, unsigned int offset, uart_datawidth_t value) +void uart_putreg(uart_addrwidth_t base, + unsigned int offset, uart_datawidth_t value) { outb(value, base + offset); } diff --git a/arch/x86/src/qemu/qemu_timerisr.c b/arch/x86/src/qemu/qemu_timerisr.c index 8e43311ba5..04dfed3a8c 100644 --- a/arch/x86/src/qemu/qemu_timerisr.c +++ b/arch/x86/src/qemu/qemu_timerisr.c @@ -58,10 +58,10 @@ * Fpit = The desired interrupt frequency. * Fin = PIT input frequency (PIT_CLOCK provided in board.h) * - * The desired timer interrupt frequency is provided by the definition CLK_TCK - * (see include/time.h). CLK_TCK defines the desired number of system clock - * ticks per second. That value is a user configurable setting that defaults - * to 100 (100 ticks per second = 10 MS interval). + * The desired timer interrupt frequency is provided by the definition + * CLK_TCK (see include/time.h). CLK_TCK defines the desired number of + * system clock ticks per second. That value is a user configurable setting + * that defaults to 100 (100 ticks per second = 10 MS interval). */ #define PIT_DIVISOR ((uint32_t)PIT_CLOCK/(uint32_t)CLK_TCK) @@ -113,7 +113,8 @@ void up_timer_initialize(void) /* Send the command byte to configure counter 0 */ - outb(PIT_OCW_MODE_SQUARE|PIT_OCW_RL_DATA|PIT_OCW_COUNTER_0, PIT_REG_COMMAND); + outb(PIT_OCW_MODE_SQUARE | PIT_OCW_RL_DATA | + PIT_OCW_COUNTER_0, PIT_REG_COMMAND); /* Set the PIT input frequency divisor */ diff --git a/arch/x86/src/qemu/qemu_vga.c b/arch/x86/src/qemu/qemu_vga.c index 2b3b49882b..28fea15759 100644 --- a/arch/x86/src/qemu/qemu_vga.c +++ b/arch/x86/src/qemu/qemu_vga.c @@ -95,8 +95,9 @@ * Private Function Prototypes ****************************************************************************/ -static int init_graph_vga(int width, int height,int chain4); -static int vga_putrun(fb_coord_t row, fb_coord_t col, FAR const uint8_t *buffer, +static int init_graph_vga(int width, int height, int chain4); +static int vga_putrun(fb_coord_t row, + fb_coord_t col, FAR const uint8_t *buffer, size_t npixels); static int vga_getrun(fb_coord_t row, fb_coord_t col, FAR uint8_t *buffer, size_t npixels); @@ -111,40 +112,109 @@ static int vga_setcontrast(struct lcd_dev_s *dev, unsigned int contrast); static int vga_open(struct file *filep); static int vga_close(struct file *filep); static ssize_t vga_read(struct file *filep, FAR char *buf, size_t buflen); -static ssize_t vga_write(struct file *filep, FAR const char *buf, size_t buflen); +static ssize_t vga_write(struct file *filep, + FAR const char *buf, size_t buflen); static off_t vga_seek(FAR struct file *filp, off_t offset, int whence); /**************************************************************************** * Private Data ****************************************************************************/ -static const uint8_t g_hor_regs[] = { 0x0, 0x1, 0x2, 0x3, 0x4, 0x5, 0x13 }; +static const uint8_t g_hor_regs[] = +{ + 0x0, 0x1, 0x2, 0x3, 0x4, 0x5, 0x13 +}; -static const uint8_t g_width_256[] = { 0x5f, 0x3f, 0x40, 0x82, 0x4a,0x9a, 0x20 }; -static const uint8_t g_width_320[] = { 0x5f, 0x4f, 0x50, 0x82, 0x54,0x80, 0x28 }; -static const uint8_t g_width_360[] = { 0x6b, 0x59, 0x5a, 0x8e, 0x5e,0x8a, 0x2d }; -static const uint8_t g_width_376[] = { 0x6e, 0x5d, 0x5e, 0x91, 0x62,0x8f, 0x2f }; -static const uint8_t g_width_400[] = { 0x70, 0x63, 0x64, 0x92, 0x65,0x82, 0x32 }; +static const uint8_t g_width_256[] = +{ + 0x5f, 0x3f, 0x40, 0x82, 0x4a, 0x9a, 0x20 +}; -static const uint8_t g_ver_regs[] = { 0x6, 0x7, 0x9, 0x10, 0x11,0x12, 0x15, 0x16 }; +static const uint8_t g_width_320[] = +{ + 0x5f, 0x4f, 0x50, 0x82, 0x54, 0x80, 0x28 +}; -static const uint8_t height_200[] = { 0xbf, 0x1f, 0x41, 0x9c, 0x8e,0x8f, 0x96, 0xb9 }; -static const uint8_t height_224[] = { 0x0b, 0x3e, 0x41, 0xda, 0x9c,0xbf, 0xc7, 0x04 }; -static const uint8_t height_240[] = { 0x0d, 0x3e, 0x41, 0xea, 0xac,0xdf, 0xe7, 0x06 }; -static const uint8_t height_256[] = { 0x23, 0xb2, 0x61, 0x0a, 0xac,0xff, 0x07, 0x1a }; -static const uint8_t height_270[] = { 0x30, 0xf0, 0x61, 0x20, 0xa9,0x1b, 0x1f, 0x2f }; -static const uint8_t height_300[] = { 0x70, 0xf0, 0x61, 0x5b, 0x8c,0x57, 0x58, 0x70 }; -static const uint8_t height_360[] = { 0xbf, 0x1f, 0x40, 0x88, 0x85,0x67, 0x6d, 0xba }; -static const uint8_t height_400[] = { 0xbf, 0x1f, 0x40, 0x9c, 0x8e,0x8f, 0x96, 0xb9 }; -static const uint8_t height_480[] = { 0x0d, 0x3e, 0x40, 0xea, 0xac,0xdf, 0xe7, 0x06 }; -static const uint8_t height_564[] = { 0x62, 0xf0, 0x60, 0x37, 0x89,0x33, 0x3c, 0x5c }; -static const uint8_t height_600[] = { 0x70, 0xf0, 0x60, 0x5b, 0x8c,0x57, 0x58, 0x70 }; +static const uint8_t g_width_360[] = +{ + 0x6b, 0x59, 0x5a, 0x8e, 0x5e, 0x8a, 0x2d +}; + +static const uint8_t g_width_376[] = +{ + 0x6e, 0x5d, 0x5e, 0x91, 0x62, 0x8f, 0x2f +}; + +static const uint8_t g_width_400[] = +{ + 0x70, 0x63, 0x64, 0x92, 0x65, 0x82, 0x32 +}; + +static const uint8_t g_ver_regs[] = +{ + 0x6, 0x7, 0x9, 0x10, 0x11, 0x12, 0x15, 0x16 +}; + +static const uint8_t height_200[] = +{ + 0xbf, 0x1f, 0x41, 0x9c, 0x8e, 0x8f, 0x96, 0xb9 +}; + +static const uint8_t height_224[] = +{ + 0x0b, 0x3e, 0x41, 0xda, 0x9c, 0xbf, 0xc7, 0x04 +}; + +static const uint8_t height_240[] = +{ + 0x0d, 0x3e, 0x41, 0xea, 0xac, 0xdf, 0xe7, 0x06 +}; + +static const uint8_t height_256[] = +{ + 0x23, 0xb2, 0x61, 0x0a, 0xac, 0xff, 0x07, 0x1a +}; + +static const uint8_t height_270[] = +{ + 0x30, 0xf0, 0x61, 0x20, 0xa9, 0x1b, 0x1f, 0x2f +}; + +static const uint8_t height_300[] = +{ + 0x70, 0xf0, 0x61, 0x5b, 0x8c, 0x57, 0x58, 0x70 +}; + +static const uint8_t height_360[] = +{ + 0xbf, 0x1f, 0x40, 0x88, 0x85, 0x67, 0x6d, 0xba +}; + +static const uint8_t height_400[] = +{ + 0xbf, 0x1f, 0x40, 0x9c, 0x8e, 0x8f, 0x96, 0xb9 +}; + +static const uint8_t height_480[] = +{ + 0x0d, 0x3e, 0x40, 0xea, 0xac, 0xdf, 0xe7, 0x06 +}; + +static const uint8_t height_564[] = +{ + 0x62, 0xf0, 0x60, 0x37, 0x89, 0x33, 0x3c, 0x5c +}; + +static const uint8_t height_600[] = +{ + 0x70, 0xf0, 0x60, 0x5b, 0x8c, 0x57, 0x58, 0x70 +}; static const uint8_t g_bg_color = 0x0f; static const uint8_t g_fg_color = 0x01; static uint8_t g_runbuffer[VGA_XRES]; -static uint8_t *g_pscreen = (uint8_t*)(0xa0000); +static uint8_t *g_pscreen = (uint8_t *)(0xa0000); static off_t g_curpos; @@ -187,7 +257,7 @@ static const struct file_operations g_vgaops = * 0=ok, -n=fail */ -static int init_graph_vga(int width, int height,int chain4) +static int init_graph_vga(int width, int height, int chain4) { const uint8_t *w; const uint8_t *h; @@ -337,22 +407,23 @@ static int init_graph_vga(int width, int height,int chain4) outb((uint8_t)a, 0x3c0); } - outb( 0x20, 0x3c0); /* enable video */ + outb(0x20, 0x3c0); /* enable video */ return 0; } -static int vga_putrun(fb_coord_t row, fb_coord_t col, FAR const uint8_t *buffer, +static int vga_putrun(fb_coord_t row, + fb_coord_t col, FAR const uint8_t *buffer, size_t npixels) { - memcpy(&g_pscreen[row*VGA_XRES + col],buffer, npixels); + memcpy(&g_pscreen[row*VGA_XRES + col], buffer, npixels); return OK; } static int vga_getrun(fb_coord_t row, fb_coord_t col, FAR uint8_t *buffer, size_t npixels) { - memcpy(buffer,&g_pscreen[row*VGA_XRES + col],npixels); + memcpy(buffer, &g_pscreen[row*VGA_XRES + col], npixels); return OK; } @@ -415,10 +486,12 @@ static ssize_t vga_read(struct file *filep, FAR char *buf, size_t buflen) } /* memcpy(&buf,&g_pscreen[y*VGA_XRES + x],buflen); */ + return buflen; } -static ssize_t vga_write(struct file *filep, FAR const char *buf, size_t buflen) +static ssize_t vga_write(struct file *filep, + FAR const char *buf, size_t buflen) { int i; int j; @@ -499,7 +572,7 @@ FAR struct lcd_dev_s *qemu_vga_initialize(void) int ret = init_graph_vga(VGA_XRES, VGA_YRES, 1); if (ret < 0) { - gerr("ERROR: init_graph_vga returned %d\n",ret); + gerr("ERROR: init_graph_vga returned %d\n", ret); } memset(g_pscreen, 0, VGA_XRES * VGA_YRES); @@ -511,7 +584,7 @@ void qemu_vga(void) int ret = init_graph_vga(VGA_XRES, VGA_YRES, 1); if (ret < 0) { - gerr("ERROR: init_graph_vga returned %d\n",ret); + gerr("ERROR: init_graph_vga returned %d\n", ret); } memset(g_pscreen, g_bg_color, VGA_XRES * VGA_YRES); diff --git a/arch/x86/src/qemu/qemu_vga.h b/arch/x86/src/qemu/qemu_vga.h index 6c5b87343f..bc77cde3ac 100644 --- a/arch/x86/src/qemu/qemu_vga.h +++ b/arch/x86/src/qemu/qemu_vga.h @@ -40,8 +40,9 @@ ****************************************************************************/ /**************************************************************************** - * Public Functions + * Public Functions Prototypes ****************************************************************************/ + /**************************************************************************** * Name: qemu_vga_initialize *