arch/stm32h7: use correct name for bit 2 in STM32_PWR_CR3 register
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@ -129,8 +129,9 @@
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#define STM32_PWR_CR3_BYPASS (1 << 0) /* Bit 0: Power management unit bypass */
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#define STM32_PWR_CR3_LDOEN (1 << 1) /* Bit 1: Low drop-out regulator enable */
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#define STM32_PWR_CR3_LDOESCUEN (1 << 2) /* Bit 2: Supply configuration update enable */
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#define STM32_PWR_CR3_SCUEN (1 << 2) /* Bit 2: Supply configuration update enable */
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#ifdef CONFIG_STM32H7_HAVE_SMPS
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#define STM32_PWR_CR3_SDEN (1 << 2) /* Bit 2: SMPS step-down converter enable */
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#define STM32_PWR_CR3_SMPSEXTHP (1 << 3) /* Bit 3: SMPS step-down converter external power delivery selection */
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#define STM32_PWR_CR3_SMPSLEVEL_SHIFT (4) /* BitS 4-5: SMPS step-down converter voltage output level selection */
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# define STM32_PWR_CR3_SMPSLEVEL_MASK (3 << STM32_PWR_CR3_SMPSLEVEL_SHIFT)
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@ -876,11 +876,11 @@ void stm32_stdclockconfig(void)
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regval = getreg32(STM32_PWR_CR3);
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regval &= ~(STM32_PWR_CR3_BYPASS | STM32_PWR_CR3_LDOEN |
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STM32_PWR_CR3_SMPSEXTHP | STM32_PWR_CR3_SMPSLEVEL_MASK);
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regval |= STM32_PWR_CR3_LDOESCUEN;
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regval |= STM32_PWR_CR3_SCUEN;
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putreg32(regval, STM32_PWR_CR3);
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#else
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regval = getreg32(STM32_PWR_CR3);
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regval |= STM32_PWR_CR3_LDOEN | STM32_PWR_CR3_LDOESCUEN;
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regval |= STM32_PWR_CR3_LDOEN | STM32_PWR_CR3_SCUEN;
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putreg32(regval, STM32_PWR_CR3);
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#endif
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@ -858,11 +858,11 @@ void stm32_stdclockconfig(void)
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regval = getreg32(STM32_PWR_CR3);
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regval &= ~(STM32_PWR_CR3_BYPASS | STM32_PWR_CR3_LDOEN |
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STM32_PWR_CR3_SMPSEXTHP | STM32_PWR_CR3_SMPSLEVEL_MASK);
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regval |= STM32_PWR_CR3_LDOESCUEN;
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regval |= STM32_PWR_CR3_SCUEN;
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putreg32(regval, STM32_PWR_CR3);
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#else
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regval = getreg32(STM32_PWR_CR3);
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regval |= STM32_PWR_CR3_LDOEN | STM32_PWR_CR3_LDOESCUEN;
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regval |= STM32_PWR_CR3_LDOEN | STM32_PWR_CR3_SCUEN;
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putreg32(regval, STM32_PWR_CR3);
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#endif
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