SAMA5D4: Complete MPDDR header file
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#define SAM_MPDDRC_DLL_SS1_OFFSET 0x0084 /* MPDDRC DLL Status Slave 1 Register */
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#define SAM_MPDDRC_DLL_SS2_OFFSET 0x0088 /* MPDDRC DLL Status Slave 2 Register */
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#define SAM_MPDDRC_DLL_SS3_OFFSET 0x008c /* MPDDRC DLL Status Slave 3 Register */
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/* 0x0094- 0x00e0 Reserved */
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/* 0x0094-0x00e0 Reserved */
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#define SAM_MPDDRC_WPCR_OFFSET 0x00e4 /* MPDDRC Write Protect Control Register */
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#define SAM_MPDDRC_WPSR_OFFSET 0x00e8 /* MPDDRC Write Protect Status Register */
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/* 0x158-0x1cc Reserved */
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#define MPDDRC_LPDDR2_LPR_BK_MASK_PASR_MASK (0xff << MPDDRC_LPDDR2_LPR_BK_MASK_PASR_SHIFT)
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# define MPDDRC_LPDDR2_LPR_BK_MASK_PASR(n) ((n) << MPDDRC_LPDDR2_LPR_BK_MASK_PASR_SHIFT)
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#define MPDDRC_LPDDR2_LPR_SEG_MASK_SHIFT (8) /* Bits 8-23: Segment Mask*/
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#define MPDDRC_LPDDR2_LPR_SEG_MASK_MASK (0xff << MPDDRC_LPDDR2_LPR_SEG_MASK_SHIFT)
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#define MPDDRC_LPDDR2_LPR_SEG_MASK_MASK (0xffff << MPDDRC_LPDDR2_LPR_SEG_MASK_SHIFT)
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# define MPDDRC_LPDDR2_LPR_SEG_MASK(n) ((n) << MPDDRC_LPDDR2_LPR_SEG_MASK_SHIFT)
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#define MPDDRC_LPDDR2_LPR_DS_SHIFT (24) /* Bits 24-27: Drive strength */
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#define MPDDRC_LPDDR2_LPR_DS_MASK (15 << MPDDRC_LPDDR2_LPR_DS_SHIFT)
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