1766 not 1768

git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@3081 42af7a65-404d-4744-a932-0658087f49c3
This commit is contained in:
patacongo 2010-11-06 16:28:41 +00:00
parent 5a297174fe
commit 7e0634a072
5 changed files with 9 additions and 9 deletions

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@ -73,7 +73,7 @@ CONFIG_ARCH=arm
CONFIG_ARCH_ARM=y
CONFIG_ARCH_CORTEXM3=y
CONFIG_ARCH_CHIP=lpc17xx
CONFIG_ARCH_CHIP_LPC1768=y
CONFIG_ARCH_CHIP_LPC1766=y
CONFIG_ARCH_BOARD=olimex-lpc1766stk
CONFIG_ARCH_BOARD_LPC1766STK=y
CONFIG_BOARD_LOOPSPERMSEC=7982

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@ -73,7 +73,7 @@ CONFIG_ARCH=arm
CONFIG_ARCH_ARM=y
CONFIG_ARCH_CORTEXM3=y
CONFIG_ARCH_CHIP=lpc17xx
CONFIG_ARCH_CHIP_LPC1768=y
CONFIG_ARCH_CHIP_LPC1766=y
CONFIG_ARCH_BOARD=olimex-lpc1766stk
CONFIG_ARCH_BOARD_LPC1766STK=y
CONFIG_BOARD_LOOPSPERMSEC=7982

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@ -8,12 +8,12 @@ ft2232_device_desc "Olimex OpenOCD JTAG A"
ft2232_layout "olimex-jtag"
ft2232_vid_pid 0x15BA 0x0003
# NXP LPC1768 Cortex-M3 with 512kB Flash and 32kB+32kB Local On-Chip SRAM, clocked with 4MHz internal RC oscillator
# NXP LPC1766 Cortex-M3 with 256kB Flash and 32kB+32kB Local On-Chip SRAM, clocked with 4MHz internal RC oscillator
if { [info exists CHIPNAME] } {
set _CHIPNAME $CHIPNAME
} else {
set _CHIPNAME lpc1768
set _CHIPNAME lpc1766
}
if { [info exists ENDIAN] } {
@ -40,7 +40,7 @@ jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CP
set _TARGETNAME $_CHIPNAME.cpu
target create $_TARGETNAME cortex_m3 -endian $_ENDIAN -chain-position $_TARGETNAME
# LPC1768 has 32kB of SRAM on its main system bus (so-called Local On-Chip SRAM)
# LPC1766 has 32kB of SRAM on its main system bus (so-called Local On-Chip SRAM)
$_TARGETNAME configure -work-area-phys 0x10000000 -work-area-size 0x8000 -work-area-backup 0
# REVISIT is there any good reason to have this reset-init event handler??
@ -51,11 +51,11 @@ $_TARGETNAME configure -event reset-init {
mwb 0xE000ED08 0x00
}
# LPC1768 has 512kB of user-available FLASH (bootloader is located in separate dedicated region).
# LPC1766 has 256kB of user-available FLASH (bootloader is located in separate dedicated region).
# flash bank lpc1700 <base> <size> 0 0 <target#> <variant> <cclk> [calc_checksum]
set _FLASHNAME $_CHIPNAME.flash
flash bank $_FLASHNAME lpc2000 0x0 0x80000 0 0 $_TARGETNAME lpc1700 80000 calc_checksum
flash bank $_FLASHNAME lpc2000 0x0 0x40000 0 0 $_TARGETNAME lpc1700 80000 calc_checksum
# 4MHz / 6 = 666kHz, so use 500
jtag_khz 100

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@ -73,7 +73,7 @@ CONFIG_ARCH=arm
CONFIG_ARCH_ARM=y
CONFIG_ARCH_CORTEXM3=y
CONFIG_ARCH_CHIP=lpc17xx
CONFIG_ARCH_CHIP_LPC1768=y
CONFIG_ARCH_CHIP_LPC1766=y
CONFIG_ARCH_BOARD=olimex-lpc1766stk
CONFIG_ARCH_BOARD_LPC1766STK=y
CONFIG_BOARD_LOOPSPERMSEC=7982

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@ -73,7 +73,7 @@ CONFIG_ARCH=arm
CONFIG_ARCH_ARM=y
CONFIG_ARCH_CORTEXM3=y
CONFIG_ARCH_CHIP=lpc17xx
CONFIG_ARCH_CHIP_LPC1768=y
CONFIG_ARCH_CHIP_LPC1766=y
CONFIG_ARCH_BOARD=olimex-lpc1766stk
CONFIG_ARCH_BOARD_LPC1766STK=y
CONFIG_BOARD_LOOPSPERMSEC=7982