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arch/x86_64/src/intel64/up_regdump.c: Fix syslog formats

This commit is contained in:
YAMAMOTO Takashi 2020-11-22 15:36:13 +09:00 committed by Xiang Xiao
parent efbf6bc44c
commit 764b2d6f04
1 changed files with 29 additions and 19 deletions
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48
arch/x86_64/src/intel64/up_regdump.c
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@ -24,6 +24,7 @@
#include <nuttx/config.h>
#include <inttypes.h>
#include <debug.h>
#include <nuttx/irq.h>
@ -43,7 +44,7 @@ void print_mem(void *sp, size_t size)
int i;
int j;
_alert("Memory Dump (%d bytes):\n", size);
_alert("Memory Dump (%zu bytes):\n", size);
for (i = 0; i < size / 8; i++)
{
@ -57,8 +58,8 @@ void print_mem(void *sp, size_t size)
}
buf[8] = '\0';
_alert(" %016llx\t%02x %02x %02x %02x %02x %02x %02x %02x\t%s\n",
(sp + i * 8),
_alert(" %016" PRIxPTR "\t%02x %02x %02x %02x %02x %02x %02x %02x\t%s\n",
(uintptr_t)(sp + i * 8),
*((uint8_t *)(sp + i * 8 + 0)),
*((uint8_t *)(sp + i * 8 + 1)),
*((uint8_t *)(sp + i * 8 + 2)),
@ -84,7 +85,7 @@ void backtrace(uint64_t rbp)
break;
}
_alert(" %016llx\t%016llx\n",
_alert(" %016" PRIx64 "\t%016" PRIx64 "\n",
*((uint64_t *)(rbp)), *((uint64_t *)(rbp + 1 * 8)));
if ((rbp) && *((uint64_t *)(rbp + 1 * 8)))
@ -107,28 +108,37 @@ void up_registerdump(uint64_t *regs)
asm volatile ("mov %%cr2, %%rax; mov %%rax, %0"::"m"(cr2):"memory", "rax");
_alert("----------------CUT HERE-----------------\n");
_alert("Gerneral Informations:\n");
_alert("CPL: %d, RPL: %d\n", regs[REG_CS] & 0x3, regs[REG_DS] & 0x3);
_alert("RIP: %016llx, RSP: %016llx\n", regs[REG_RIP], regs[REG_RSP]);
_alert("RBP: %016llx, RFLAGS: %016llx\n",
_alert("CPL: %" PRId64 ", RPL: %" PRId64 "\n",
regs[REG_CS] & 0x3, regs[REG_DS] & 0x3);
_alert("RIP: %016" PRIx64 ", RSP: %016" PRIx64 "\n",
regs[REG_RIP], regs[REG_RSP]);
_alert("RBP: %016" PRIx64 ", RFLAGS: %016" PRIx64 "\n",
regs[REG_RBP], regs[REG_RFLAGS]);
_alert("MSR_STAR: %016llx, MSR_LSTAR: %016llx\n",
_alert("MSR_STAR: %016" PRIx64 ", MSR_LSTAR: %016" PRIx64 "\n",
read_msr(0xc0000081), read_msr(0xc0000082));
_alert("MXCSR: %016llx, MSR_FS_BASE: %016llx\n",
_alert("MXCSR: %016" PRIx64 ", MSR_FS_BASE: %016" PRIx64 "\n",
mxcsr, read_msr(MSR_FS_BASE));
_alert("CR2: %016llx\n", cr2);
_alert("CR2: %016" PRIx64 "\n", cr2);
_alert("Selector Dump:\n");
_alert("CS: %016llx, DS: %016llx, SS: %016llx\n",
_alert("CS: %016" PRIx64 ", DS: %016" PRIx64 ", SS: %016" PRIx64 "\n",
regs[REG_CS], regs[REG_DS], regs[REG_SS]);
_alert("ES: %016llx, FS: %016llx, GS: %016llx\n",
_alert("ES: %016" PRIx64 ", FS: %016" PRIx64 ", GS: %016" PRIx64 "\n",
regs[REG_ES], regs[REG_FS], regs[REG_GS]);
_alert("Register Dump:\n");
_alert("RAX: %016llx, RBX: %016llx\n", regs[REG_RAX], regs[REG_RBX]);
_alert("RCX: %016llx, RDX: %016llx\n", regs[REG_RCX], regs[REG_RDX]);
_alert("RDI: %016llx, RSI: %016llx\n", regs[REG_RDI], regs[REG_RSI]);
_alert(" R8: %016llx, R9: %016llx\n", regs[REG_R8] , regs[REG_R9]);
_alert("R10: %016llx, R11: %016llx\n", regs[REG_R10], regs[REG_R11]);
_alert("R12: %016llx, R13: %016llx\n", regs[REG_R12], regs[REG_R13]);
_alert("R14: %016llx, R15: %016llx\n", regs[REG_R14], regs[REG_R15]);
_alert("RAX: %016" PRIx64 ", RBX: %016" PRIx64 "\n",
regs[REG_RAX], regs[REG_RBX]);
_alert("RCX: %016" PRIx64 ", RDX: %016" PRIx64 "\n",
regs[REG_RCX], regs[REG_RDX]);
_alert("RDI: %016" PRIx64 ", RSI: %016" PRIx64 "\n",
regs[REG_RDI], regs[REG_RSI]);
_alert(" R8: %016" PRIx64 ", R9: %016" PRIx64 "\n",
regs[REG_R8] , regs[REG_R9]);
_alert("R10: %016" PRIx64 ", R11: %016" PRIx64 "\n",
regs[REG_R10], regs[REG_R11]);
_alert("R12: %016" PRIx64 ", R13: %016" PRIx64 "\n",
regs[REG_R12], regs[REG_R13]);
_alert("R14: %016" PRIx64 ", R15: %016" PRIx64 "\n",
regs[REG_R14], regs[REG_R15]);
_alert("Dumping Stack (+-64 bytes):\n");
if (regs[REG_RSP] > 0 && regs[REG_RSP] < 0x1000000)