arch/arm/samv7: initial support for LIN bus communication
Signed-off-by: Petro Karashchenko <petro.karashchenko@gmail.com> Co-authored-by: Petro Karashchenko <petro.karashchenko@gmail.com>
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@ -248,7 +248,7 @@
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#define UART_CR_STTBRK (1 << 9) /* Bit 9: Start Break (USART, UART mode only) */
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#define UART_CR_STPBRK (1 << 10) /* Bit 10: Stop Break (USART, UART mode only) */
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#define UART_CR_STTTO (1 << 11) /* Bit 11: Start Time-out (USART, UART mode only) */
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#define UART_CR_REQCLR (1 << 12) /* Bit 12:Request Clear (UART only) */
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#define UART_CR_REQCLR (1 << 12) /* Bit 12: Request Clear (UART only) */
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#define UART_CR_SENDA (1 << 12) /* Bit 12: Send Address (USART, UART mode only) */
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#define UART_CR_RETTO (1 << 15) /* Bit 15: Rearm Time-out (USART, UART mode only) */
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#define UART_CR_RTSEN (1 << 18) /* Bit 18: Request to Send Enable (USART, UART mode only) */
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@ -266,6 +266,8 @@
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# define UART_MR_MODE_RS485 (1 << UART_MR_MODE_SHIFT) /* RS485 */
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# define UART_MR_MODE_HWHS (2 << UART_MR_MODE_SHIFT) /* Hardware Handshaking */
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# define UART_MR_MODE_LON (9 << UART_MR_MODE_SHIFT) /* LON */
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# define UART_MR_MODE_LINMSTR (10 << UART_MR_MODE_SHIFT) /* LIN Master */
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# define UART_MR_MODE_LINSLV (11 << UART_MR_MODE_SHIFT) /* LIN Slave */
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# define UART_MR_MODE_SPIMSTR (14 << UART_MR_MODE_SHIFT) /* SPI Master (SPI mode only) */
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# define UART_MR_MODE_SPISLV (15 << UART_MR_MODE_SHIFT) /* SPI Slave (SPI mode only) */
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@ -1040,11 +1040,9 @@ static int sam_interrupt(int irq, void *context, FAR void *arg)
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static int sam_ioctl(struct file *filep, int cmd, unsigned long arg)
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{
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#if defined(CONFIG_SERIAL_TERMIOS) || defined(CONFIG_SERIAL_TIOCSERGSTRUCT)
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struct inode *inode = filep->f_inode;
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struct uart_dev_s *dev = inode->i_private;
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#endif
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int ret = OK;
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int ret = OK;
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switch (cmd)
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{
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@ -1223,6 +1221,62 @@ static int sam_ioctl(struct file *filep, int cmd, unsigned long arg)
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break;
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#endif /* CONFIG_SERIAL_TERMIOS */
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case TIOCSLINID:
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{
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/* Switch USART to LIN mode -> Set identifier register -> This will
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* issue a LIN header -> Restore USART mode
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*/
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struct sam_dev_s *priv = (struct sam_dev_s *)dev->priv;
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uint32_t regvalsave = 0;
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uint32_t regval = 0;
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/* Save actual configuration */
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regvalsave = sam_serialin(priv, SAM_UART_MR_OFFSET);
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/* Issue a LIN header (Master mode only) */
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regval = regvalsave & ~UART_MR_MODE_MASK;
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regval |= UART_MR_MODE_LINMSTR;
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sam_serialout(priv, SAM_UART_MR_OFFSET, regval);
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/* Reset transaction status bits */
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sam_serialout(priv, SAM_UART_CR_OFFSET, UART_CR_RSTSTA);
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/* Write LIN ID to trigger header transmission */
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regval = UART_LINIR_MASK & (uint8_t)arg;
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sam_serialout(priv, SAM_UART_LINIR_OFFSET, regval);
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/* Wait until the header is on the wire */
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do
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{
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/* Header takes 34 bits to transmit so poll with 34 / 4 = 8 bits
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* cycle time
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*
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* TODO: Interrupt + semaphore can be used instead of busy
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* waiting to improve CPU utilization
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*/
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usleep((8 * 1000 * 1000) / priv->baud);
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regval = sam_serialin(priv, SAM_UART_SR_OFFSET);
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}
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while ((regval & UART_INT_LINID) == 0);
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/* Reset transaction status bits */
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sam_serialout(priv, SAM_UART_CR_OFFSET, UART_CR_RSTSTA);
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/* Restore USART mode */
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sam_serialout(priv, SAM_UART_MR_OFFSET, regvalsave);
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}
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break;
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default:
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ret = -ENOTTY;
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break;
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@ -197,6 +197,10 @@
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#define SER_SWAP_ENABLED (1 << 0) /* Enable/disable RX/TX swap */
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/* LIN Protocol Support */
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#define TIOCSLINID _TIOC(0x0037) /* Master send one LIN header with specified LIN identifier: uint8_t */
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/****************************************************************************
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* Public Type Definitions
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****************************************************************************/
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