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arch/arm/src: add pl310 l2cache's kconfig for latency 

Signed-off-by: luoyong1 <luoyong1@xiaomi.com>
This commit is contained in:
luoyong1 2023-01-12 11:08:08 +08:00 committed by Xiang Xiao
parent 896dbb2499
commit 6975bbb38d
4 changed files with 72 additions and 2 deletions
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35
arch/arm/src/armv7-a/Kconfig
View File

@ -73,6 +73,41 @@ config PL310_ADDRESS_FILTERING
bool "PL310 Address Filtering by Line"
default n
config PL310_TRCR
bool "PL310 TRCR set by usr"
default n
if PL310_TRCR
config PL310_TRCR_TSETLAT
int "PL310 TRCR setup latency"
default 1
config PL310_TRCR_TRDLAT
bool "PL310 TRCR read access latency"
default 1
config PL310_TRCR_WRLAT
bool "PL310 TRCR write access latency"
default 1
endif # PL310_TRCR
config PL310_DRCR
bool "PL310 DRCR set by usr"
default n
if PL310_DRCR
config PL310_DRCR_TSETLAT
int "PL310 DRCR setup latency"
default 1
config PL310_DRCR_TRDLAT
bool "PL310 DRCR read access latency"
default 1
config PL310_DRCR_WRLAT
bool "PL310 DRCR write access latency"
default 1
endif # PL310_DRCR
endif # ARMV7A_L2CC_PL310
choice

2
arch/arm/src/armv7-a/arm_l2cc_pl310.c
View File

@ -357,7 +357,7 @@ void arm_l2ccinitialize(void)
defined(CONFIG_PL310_TRCR_TWRLAT)
/* Configure Tag RAM control */
regval = ((CONFIG_PL310_TRCR_TSETLAT - 1) << L2CC_TRCR_TSETLAT_SHIFT)
regval = ((CONFIG_PL310_TRCR_TSETLAT - 1) << L2CC_TRCR_TSETLAT_SHIFT) |
((CONFIG_PL310_TRCR_TRDLAT - 1) << L2CC_TRCR_TRDLAT_SHIFT) |
((CONFIG_PL310_TRCR_TWRLAT - 1) << L2CC_TRCR_TWRLAT_SHIFT);
putreg32(regval, L2CC_TRCR);

35
arch/arm/src/armv7-r/Kconfig
View File

@ -80,6 +80,41 @@ config PL310_ADDRESS_FILTERING
bool "PL310 Address Filtering by Line"
default n
config PL310_TRCR
bool "PL310 TRCR set by usr"
default n
if PL310_TRCR
config PL310_TRCR_TSETLAT
int "PL310 TRCR setup latency"
default 1
config PL310_TRCR_TRDLAT
bool "PL310 TRCR read access latency"
default 1
config PL310_TRCR_WRLAT
bool "PL310 TRCR write access latency"
default 1
endif # PL310_TRCR
config PL310_DRCR
bool "PL310 DRCR set by usr"
default n
if PL310_DRCR
config PL310_DRCR_TSETLAT
int "PL310 DRCR setup latency"
default 1
config PL310_DRCR_TRDLAT
bool "PL310 DRCR read access latency"
default 1
config PL310_DRCR_WRLAT
bool "PL310 DRCR write access latency"
default 1
endif # PL310_DRCR
endif # ARMV7R_L2CC_PL310
choice

2
arch/arm/src/armv7-r/arm_l2cc_pl310.c
View File

@ -357,7 +357,7 @@ void arm_l2ccinitialize(void)
defined(CONFIG_PL310_TRCR_TWRLAT)
/* Configure Tag RAM control */
regval = ((CONFIG_PL310_TRCR_TSETLAT - 1) << L2CC_TRCR_TSETLAT_SHIFT)
regval = ((CONFIG_PL310_TRCR_TSETLAT - 1) << L2CC_TRCR_TSETLAT_SHIFT) |
((CONFIG_PL310_TRCR_TRDLAT - 1) << L2CC_TRCR_TRDLAT_SHIFT) |
((CONFIG_PL310_TRCR_TWRLAT - 1) << L2CC_TRCR_TWRLAT_SHIFT);
putreg32(regval, L2CC_TRCR);