add LPC4337FET256

This commit is contained in:
ahb 2017-03-09 10:30:28 +01:00
parent f50072bd6b
commit 67c86e5aa9
3 changed files with 34 additions and 1 deletions

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@ -347,6 +347,32 @@
# define LPC43_NADC10 (2) /* Two 10-bit ADC controllers */
# define LPC43_NADC10_CHANNELS (8) /* Eight ADC channels */
# undef LPC43_NADC12 /* No 12-bit ADC controllers */
#elif defined(CONFIG_ARCH_CHIP_LPC4337FET256)
# define LPC43_FLASH_BANKA_SIZE (512*1024) /* 1024Kb FLASH */
# define LPC43_FLASH_BANKB_SIZE (512*1024)
# define LPC43_LOCSRAM_BANK0_SIZE (32*1024) /* 72Kb Local SRAM */
# define LPC43_LOCSRAM_BANK1_SIZE (40*1024)
# define LPC43_AHBSRAM_BANK0_SIZE (48*1024) /* 64Kb AHB SRAM */
# define LPC43_AHBSRAM_BANK1_SIZE (0)
# define LPC43_AHBSRAM_BANK2_SIZE (16*1024)
# define LPC43_EEPROM_SIZE (16*1024) /* 16Kb EEPROM */
# undef LPC43_NLCD /* No LCD controller */
# define LPC43_ETHERNET (1) /* One Ethernet controller */
# define LPC43_USB0 (1) /* Have USB0 (Host, Device, OTG) */
# define LPC43_USB1 (1) /* Have USB1 (Host, Device) */
# define LPC43_USB1_ULPI (1) /* Have USB1 (Host, Device) with ULPI I/F */
# define LPC43_MCPWM (1) /* One PWM interface */
# define LPC43_QEI (1) /* One Quadrature Encoder interface */
# define LPC43_NUSARTS (4) /* Three USARTs + 1 UART */
# define LPC43_NSSP (2) /* Two SSP controllers */
# define LPC43_NTIMERS (4) /* Four Timers */
# define LPC43_NI2C (2) /* Two I2C controllers */
# define LPC43_NI2S (2) /* Two I2S controllers */
# define LPC43_NCAN (2) /* Two CAN controllers */
# define LPC43_NDAC (1) /* One 10-bit DAC */
# define LPC43_NADC10 (2) /* Two 10-bit ADC controllers */
# define LPC43_NADC10_CHANNELS (8) /* Eight ADC channels */
# undef LPC43_NADC12 /* No 12-bit ADC controllers */
#elif defined(CONFIG_ARCH_CHIP_LPC4350FBD208)
# define LPC43_FLASH_BANKA_SIZE (0) /* Flashless */
# define LPC43_FLASH_BANKB_SIZE (0)

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@ -40,6 +40,9 @@ config ARCH_CHIP_LPC4337JBD144
config ARCH_CHIP_LPC4337JET100
bool "LPC4337JET100"
config ARCH_CHIP_LPC4337FET256
bool "LPC4337FET256"
config ARCH_CHIP_LPC4350FBD208
bool "LPC4350FBD208"
@ -91,7 +94,7 @@ config ARCH_FAMILY_LPC4330
config ARCH_FAMILY_LPC4337
bool
default y if ARCH_CHIP_LPC4337JBD144
default y if ARCH_CHIP_LPC4337JBD144 || ARCH_CHIP_LPC4337FET256
select ARCH_HAVE_TICKLESS
select ARCH_HAVE_AHB_SRAM_BANK1

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@ -101,6 +101,10 @@
# define ARMV7M_PERIPHERAL_INTERRUPTS 53
# include "chip/lpc435357_memorymap.h"
# include "chip/lpc4357fet256_pinconfig.h"
#elif defined(CONFIG_ARCH_CHIP_LPC4337FET256)
# define ARMV7M_PERIPHERAL_INTERRUPTS 53
# include "chip/lpc435357_memorymap.h"
# include "chip/lpc4310203050_pinconfig.h"
#elif defined(CONFIG_ARCH_CHIP_LPC4350FBD208)
# define ARMV7M_PERIPHERAL_INTERRUPTS 53
# include "chip/lpc4310203050_memorymap.h"