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Documentation/NuttX.html: Update the NuttX 'about' document in preparation for the NuttX-8.2 release.

This commit is contained in:
Gregory Nutt 2019-11-16 09:58:36 -06:00
parent ac1b96ba1e
commit 66401c8960
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Documentation/NuttX.html
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@ -104,7 +104,7 @@
<tr align="center" bgcolor="#e4e4e4">
<td>
<h1><big><font color="#3c34ec"><i>NuttX RTOS</i></font></big></h1>
<p>Last Updated: September 14, 2019</p>
<p>Last Updated: November 16, 2019</p>
</td>
</tr>
</table>
@ -1467,11 +1467,11 @@
<h2>Released Versions</h2>
<p>
In addition to the ever-changing GIT repository, there are frozen released versions of NuttX available.
The current release is NuttX 8.1.
NuttX 8.1 is the 132<sup>nd</sup> release of NuttX.
It was released on September 14, 2019, and is available for download from the
The current release is NuttX 8.2.
NuttX 8.2 is the 133<sup>rd</sup> release of NuttX.
It was released on November 16, 2019, and is available for download from the
<a href="https://bitbucket.org/nuttx/nuttx/downloads/">Bitbucket.org</a> website.
Note that the release consists of two tarballs: <code>nuttx-8.1.tar.gz</code> and <code>apps-8.1.tar.gz</code>.
Note that the release consists of two tarballs: <code>nuttx-8.2.tar.gz</code> and <code>apps-8.2.tar.gz</code>.
Both may be needed (see the top-level <code>nuttx/README.txt</code> file for build information).
</p>
@ -1480,7 +1480,7 @@
<ul>
<li><b>nuttx</b>.
<ul><p>
Release notes for NuttX 8.1 are available <a href="https://bitbucket.org/nuttx/nuttx/downloads/">here</a>.
Release notes for NuttX 8.2 are available <a href="https://bitbucket.org/nuttx/nuttx/downloads/">here</a>.
Release notes for all released versions on NuttX are available in the <a href="https://bitbucket.org/nuttx/nuttx/src/master/ReleaseNotes" target="_blank">Bitbucket GIT</a>.
The ChangeLog for all releases of NuttX is available in the ChangeLog file that can viewed in the <a href="https://bitbucket.org/nuttx/nuttx/src/master/ChangeLog" target="_blank">Bitbucket GIT</a>.
The ChangeLog for the current release is at the bottom of that file.
@ -1488,7 +1488,7 @@
</li></ul>
<li><b>apps</b>.
<ul><p>
Release notes for NuttX 8.1 are available <a href="https://bitbucket.org/nuttx/apps/downloads/">here</a>.
Release notes for NuttX 8.2 are available <a href="https://bitbucket.org/nuttx/apps/downloads/">here</a>.
Release notes for all released versions on NuttX are available in the <a href="https://bitbucket.org/nuttx/nuttx/src/master/ReleaseNotes" target="_blank">Bitbucket GIT</a>
The ChangeLog for the all releases of <code>apps/</code> is available in the ChangeLog file that can viewed in the <a href="https://bitbucket.org/nuttx/apps/src/master/ChangeLog.txt" target="_blank">Bitbucket GIT</a>.
The ChangeLog for the current release is at the bottom of that file.
@ -1544,7 +1544,7 @@
<li><a href="#armcortexa8">ARM Cortex-A8</a> (2)</li>
<li><a href="#armcortexa9">ARM Cortex-A9</a> (1)</li>
<li><a href="#armcortexr4">ARM Cortex-R4</a> (2)</li>
<li><a href="#armcortexm0">ARM Cortex-M0/M0+</a> (11)</li>
<li><a href="#armcortexm0">ARM Cortex-M0/M0+</a> (13)</li>
<li><a href="#armcortexm3">ARM Cortex-M3</a> (39)</li>
<li><a href="#armcortexm4">ARM Cortex-M4</a> (59)</li>
<li><a href="#armcortexm7">ARM Cortex-M7</a> (14)</li>
@ -1555,13 +1555,13 @@
<li><a href="#atmelavr32">Atmel AVR32</a> (1) </li>
</ul>
</li>
</td>
<td bgcolor="#e4e4e4" valign="top" width="33%">
<li>Freescale
<ul>
<li><a href="#m68hcs12">M68HCS12</a> (2)</li>
</ul>
</li>
</td>
<td bgcolor="#e4e4e4" valign="top" width="33%">
<li>Intel
<ul>
<li><a href="#80x86">Intel 80x86</a> (2)</li>
@ -1584,18 +1584,19 @@
<li><a href="#mor1kx">mor1kx</a> (1)</li>
</ul>
</li>
</td>
<td bgcolor="#e4e4e4" valign="top" width="33%">
<li>Renesas/Hitachi:
<ul>
<li><a href="#superh">Renesas/Hitachi SuperH</a> (1/2)</li>
<li><a href="#m16c">Renesas M16C/26</a> (1/2)</li>
<li><a href="#rx65n">Renesas RX65N</a> (2)</li>
</ul>
</li>
</td>
<td bgcolor="#e4e4e4" valign="top" width="33%">
<li><a href="#riscv">RISC-V</a> (2)
<ul>
<li><a href="#nr5mxx"> NEXT RISC-V NR5Mxx</a> (1)</li>
<li><a href="#gwgap8">GreenWaves GAP8 (1)</li>
<li><a href="#gwgap8">GreenWaves GAP8 (1)</a></li>
</ul>
</li>
<li>Xtensa LX6:
@ -1681,6 +1682,7 @@
<li><a href="#avrat90usbxxx">AVR AT90USB64x and AT90USB6128x</a> <small>(8-bit AVR)</small></li>
<li><a href="#at32uc3bxxx">AVR32 AT32UC3BXXX</a> <small>(32-bit AVR32)</small></li>
<li><a href="#at91samd20">Atmel SAMD20</a> <small>(ARM Cortex-M0+)</small></li>
<li><a href="#at91samd21">Atmel SAMD21</a> <small>(ARM Cortex-M0+)</small></li>
<li><a href="#at91saml21">Atmel SAML21</a> <small>(ARM Cortex-M0+)</small></li>
<li><a href="#at91sam3u">Atmel SAM3U</a> <small>(ARM Cortex-M3)</small></li>
<li><a href="#at91sam3x">Atmel SAM3X</a> <small>(ARM Cortex-M3)</small></li>
@ -1717,14 +1719,14 @@
<li><a href="#freescaleimx1">NXP/Freescale i.MX1</a> <small>(ARM920-T)</small></li>
<li><a href="#freescaleimx6">NXP/Freescale i.MX6</a> <small>(ARM Cortex-A9)</small></li>
<li><a href="#freescaleimxrt">NXP/Freescale i.MX RT</a> <small>(ARM Cortex-M7)</small></li>
<li><a href="#freescalekl25z">NXP/FreeScale KL25Z</a> <small>(ARM Cortex-M0+)</small></li>
<li><a href="#freescalekl26z">NXP/FreeScale KL26Z</a> <small>(ARM Cortex-M0+)</small></li>
</ul>
</li>
</td>
<td bgcolor="#e4e4e4" valign="top" width="33%">
<li>NXP/Freescale (Continued)
<ul>
<li><a href="#freescalekl25z">NXP/FreeScale KL25Z</a> <small>(ARM Cortex-M0+)</small></li>
<li><a href="#freescalekl26z">NXP/FreeScale KL26Z</a> <small>(ARM Cortex-M0+)</small></li>
<li><a href="#kinetisk20">NXP/FreeScale Kinetis K20</a> <small>(ARM Cortex-M4)</small></li>
<li><a href="#kinetisk28">NXP/FreeScale Kinetis K28</a> <small>(ARM Cortex-M4)</small></li>
<li><a href="#kinetisk40">NXP/FreeScale Kinetis K40</a> <small>(ARM Cortex-M4)</small></li>
@ -1759,6 +1761,7 @@
<ul>
<li><a href="#superh">Renesas/Hitachi SuperH</a></li>
<li><a href="#m16c">Renesas M16C/26</a></li>
<li><a href="#rx65n">Renesas RX65N</a></li>
</ul>
</li>
<li>Silicon Laboratories, Inc.
@ -1776,7 +1779,8 @@
<ul>
<li><a href="#str71x">STMicro STR71x</a> <small>(ARM7TDMI)</small></li>
<li><a href="#stm32f0xx">STMicro STM32F0xx</a> <small>(STM32 F0, ARM Cortex-M0)</small></li>
<li><a href="#stm32L0xx">STMicro STM32L0xx</a> <small>(STM32 L0, ARM Cortex-M0)</small></li>
<li><a href="#stm32l0xx">STMicro STM32L0xx</a> <small>(STM32 L0, ARM Cortex-M0)</small></li>
<li><a href="#stm32g0xx">STMicro STM32G0xx</a> <small>(STM32 G0 ARM Cortex-M0+)</small></li>
<li><a href="#stm32l152">STMicro STM32L152</a> <small>(STM32 L1 &quot;EnergyLite&quot; Line, ARM Cortex-M3)</small></li>
<li><a href="#stm32l162">STMicro STM32L162</a> <small>(STM32 L1 &quot;EnergyLite&quot; Medium+ Density, ARM Cortex-M3)</small></li>
<li><a href="#stm32f100x">STMicro STM32F100x</a> <small>(STM32 F1 &quot;Value Line&quot;Family, ARM Cortex-M3)</small></li>
@ -1789,13 +1793,13 @@
<li><a href="#stm32f207x">STMicro STM32F207x</a> <small>(STM32 F2 family, ARM Cortex-M3)</small></li>
<li><a href="#stm32f302x">STMicro STM32F302x</a> <small>(STM32 F3 family, ARM Cortex-M4)</small></li>
<li><a href="#stm32f303x">STMicro STM32F303x</a> <small>(STM32 F3 family, ARM Cortex-M4)</small></li>
<li><a href="#stm32f334x">STMicro STM32F334</a> <small>(STM32 F3 family, ARM Cortex-M4)</small></li>
</ul>
</li>
</td>
<td bgcolor="#e4e4e4" valign="top" width="33%">
<li>STMicroelectronics (Continued)
<ul>
<li><a href="#stm32f334x">STMicro STM32F334</a> <small>(STM32 F3 family, ARM Cortex-M4)</small></li>
<li><a href="#stm32f372x">STMicro STM32 F372/F373</a> <small>(ARM Cortex-M4)</small></li>
<li><a href="#stm32f4x1">STMicro STM32F4x1</a> <small>(STM32 F4 family, ARM Cortex-M4)</small></li>
<li><a href="#stm32f410">STMicro STM32F410</a> <small>(STM32 F4 family, ARM Cortex-M4)</small></li>
@ -2721,6 +2725,7 @@ nsh>
</ul>
</td>
</tr>
<tr>
<td><br></td>
<td><hr></td>
@ -2747,6 +2752,35 @@ nsh>
</ul>
</td>
</tr>
<tr>
<td><br></td>
<td><hr></td>
</tr>
<tr>
<td><br></td>
<td>
<p>
<a name="at91samd21"><b>Atmel SAMD21</b>.</a>
There two boards supported for the SAMD21:
</p>
<ol>
<li>
The port of NuttX to the Atmel SAMD21-Xplained Pro development board added in NuttX-7.11, and
</li>
<li>
The port of NuttX to the Arduino-M0 contributed by Alan Carvalho de Assis in NuttX-8.2. The initial release included <i>nsh</i> and <i>usbnsh</i> configurations.
</li>
</ol>
<ul>
<p>
<b>STATUS</b>.
Refer to the board README files for the <a href="https://bitbucket.org/nuttx/nuttx/src/master/boards/arm/samd2l2/samd21-xplained/README.txt" target="_blank">SAMD21-Xplained</a> and the <a href="https://bitbucket.org/nuttx/nuttx/src/master/boards/arm/samd2l2/arduino-m0/README.txt" target="_blank">Arduino-M0</a> for further information.
</p>
</ul>
</td>
</tr>
<tr>
<td><br></td>
<td><hr></td>
@ -3255,7 +3289,7 @@ nsh>
<td><br></td>
<td>
<p>
<a name="stm32L0xx"><b>STMicro STM32L0xx (STM32 L0, ARM Cortex-M0)</b>.</a>
<a name="stm32l0xx"><b>STMicro STM32L0xx (STM32 L0, ARM Cortex-M0)</b>.</a>
Support for the STM32 FL family was contributed by Mateusz Sfafoni in NuttX-7.28.
There are ports to two different STM32 L0 boards in the repository:
</p>
@ -3270,12 +3304,35 @@ nsh>
</li>
</ul>
</tr>
<tr>
<td><br></td>
<td>
<p>
<a name="stm32g0xx"><b>STMicro STM32G0xx (STM32 G0, ARM Cortex-M0+)</b>.</a>
Support for the STM32 FL family was contributed by Mateusz Sfafoni in NuttX-7.28.
There are ports to two different STM32 L0 boards in the repository:
</p>
<ul>
<li>
<b>Nucleo-G071RB</b>
Initial support for Nucleo-G071RB was contributed by Mateusz Szafoni in NuttX-7.31.
Refer to the board <a href="https://bitbucket.org/nuttx/nuttx/src/master/boards/arm/stm32f0l0g0/nucleo-g071rb/README.txt">README</a> file for further information.
</li>
<li>
<b>Nucleo-G070RB</b>
Contributed by Daniel Pereira Volpato. in NuttX-8.2.
Refer to the board <a href="https://bitbucket.org/nuttx/nuttx/src/master/boards/arm/stm32f0l0g0/nucleo-g070rb/README.txt">README</a> file for further information.
</li>
</ul>
</tr>
<tr>
<td><br></td>
<td>
<p>
<b>STATUS:</b>
Status for both the STM32F0xx and STM32L0xx is show together since the two parts share many drivers in common.
Status for the STM32F0xx, STM32L0xx, and STM32G0xx is shown together since these parts share many drivers in common.
</p>
<ul>
<li>
@ -3299,6 +3356,10 @@ nsh>
Add AES and RND drivers for the L0. From Mateusz Szafoni.
Add support for HS148 for L0. From Mateusz Szafoni.
</li>
<li>
<b>NuttX-8.2</b>
Added PWM and TIM drivers for the G0. From Daniel Pereira Volpato.
</li>
</p>
</td>
</tr>
@ -4314,6 +4375,11 @@ nsh>
<b>NuttX-8.1</b>.
Alin Jerpelea brought in ten (external) sensor drivers that integrate through the CXD56xx's SCU.
</p>
<p>
<b>NuttX-8.2</b>.
Masayuki Ishikawa implemented SMP operation of the CX56Dxx parts.
Alin Jerpelea: Added support for the Altair LTE modem support, enabled support for accelerated format converter, rotation and so on using the CXD5602 image processing accelerator, added ISX012 camera support, added audio and board audio control implementation, added an audio_tone_generator, added optional initialization of GNSS and GEOFENCE at boot if the drivers are enabled, added an lcd examples configuration.
</p>
</li>
<ul>
</ul>
@ -4911,14 +4977,24 @@ nsh>
</ul>
<p>
<b>NuttX-7.22</b>.
</p>
<ul>
<li>DAC and ADC drivers were contributed by Juha Niskanen.</li>
</ul>
<p>
<b>NuttX-7.30</b>.
</p>
<ul>
<li>Added USB FS device driver, CRS and HSI38 support from Juha Niskanen.</li>
</ul>
<p>
<b>NuttX-8.2</b>.
</p>
<ul>
<li>Add DMA support for STM32L4+ series. From Jussi Kivilinna.</li>
<li>Add support for LPTIM timers on the STM32L4 as PWM outputs. From Matias N.</li
<li>Enable OTGFS for STM32L4+ series. The OTGFS peripheral on stm32l4x6 and stm32l4rxxx reference manual is exactly the same. From Jussi Kivilinna.</li
</ul>
</td>
</tr>
@ -4987,7 +5063,7 @@ nsh>
<td>
<p>
<a name="stm32l4rx"><b>STMicro STM32 L4Rx</b>.</a>
Architecture support for STM32 L4+ family was contributed by Juha Niskanen along with board support for the STM32L4R9I-Discovery in NuttX-7.26:
Architecture support for STM32 L4+ family was contributed by Juha Niskanen along with board support for the STM32L4R9I-Discovery in NuttX-7.26. Additional support for the STM32L4R5ZI part was added by Jussi in NuttX-8.2.
</p>
<ul>
<li>
@ -5975,6 +6051,11 @@ Mem: 29232 5920 23312 23312
Added support for BBSRAM, DTCM, RTC, and UID. All from David Sidrane.
</p>
</li>
<li>
<p><b>NuttX-8.2</b>.
Added support for SDMMC and FLASH progmem. From David Sidrane.
</p>
</li>
</p>
</td>
</tr>
@ -6008,7 +6089,12 @@ Mem: 29232 5920 23312 23312
</p></li>
<li><p>
Architecture-only support for the IMXRT1020 family was contributed in NuttX-7.30 by Dave Marples.
Board support is anticipated in the next release.
</p></li>
<li><p>
The basic IMXRT1020-EVK port was complete with verified configurations in NuttX-8.2.
This is again the work of Dave Marples.
The initial release includes <i>nsh</i>, <i>netnsh</i>, and <i>usdhc</i> configurations.
Refer to the NuttX board <a href="https://bitbucket.org/nuttx/nuttx/src/master/boards/arm/imxrt/imxrt1020-evk/README.txt" target="_blank">README</a> file for further information.
</p></li>
</ul>
<p>
@ -6044,6 +6130,11 @@ Mem: 29232 5920 23312 23312
USB EHCI Host and USDHC drivers were added in NuttX-7.31 by Dave Marples.
</p>
</li>
<li>
<p><b>NuttX-8.2</b>.
An LCD drivers was added in NuttX-8.2 by Fabio Balzano.
</p>
</li>
</ul>
</td>
</tr>
@ -6684,6 +6775,36 @@ BFD_ASSERT (*plt_offset != (bfd_vma) -1);
</tr>
<tr>
<td valign="top"><img height="20" width="20" src="favicon.ico"></td>
<td bgcolor="#5eaee1">
<a name="rx65n"><b>Renesas RX65N</b>.</a>
</td>
</tr>
<tr>
<td><br></td>
<td>
<p>
Support for the Renesas RX65N family was released in NuttX with a contribution from Anjana.
Two boards are supported in this initial release:
</p>
<ul>
<li><b>RSK RX65N-2MB</b>.</li>
This board features the R5F565NEHDFC (176pin).
Refer to the boar <a href="https://bitbucket.org/nuttx/nuttx/src/master/boards/renesas/rx65n/rx65n-rsk2mb/README.txt" target="_blank">README</a> file for further information.
<li><b>GR-Rose</b>.</li>
The GR-ROSE board was produced by Gadget Renesas.
This board features the R5F565NEHDFP (100pin QFP).
Refer to the board <a href="https://bitbucket.org/nuttx/nuttx/src/master/boards/renesas/rx65n/rx65n-grrose/README.txt" target="_blank">README</a> file for further information.
</ul>
<p><b>STATUS</b></p>
<ul>
<li><b>NuttX-8.2</b></li>
Basic support for the RX65N family was released by Anjana with support for two boards: The RSK RX65N-2MB and the GR-Rose.
</ul>
</td>
</tr>
<tr>
<td valign="top"><img height="20" width="20" src="favicon.ico"></td>
<td bgcolor="#5eaee1">

32
ReleaseNotes
View File

@ -391,7 +391,7 @@ This release of NuttX includes the following changes:
* Add support for the add-on Pascal P-Code interpreter (pcode/)
(see the pascal-0.1.0 package)
This release were verified only on the simulated Z80 and and host
This release were verified only on the simulated Z80 and host
simulation targets. As usual, any feedback about bugs or suggestions
for improvement would be greatly appreciated.
@ -932,7 +932,7 @@ around, the Luminary LM3S6918 MCU. This is the first ARM Cortex-M3
architecture supported by Nuttx. This initial, basic port includes
timer and serial console with configurations to execute the NuttX
OS test and to run the NuttShell (NSH). Work is still underway on
this port and current plans are to have I2C, SSI, MMC/SD, and and
this port and current plans are to have I2C, SSI, MMC/SD, and
Ethernet driver in the 0.4.7 release.
Additional work was done on the MXADS i.MX1 port, however, that
@ -14044,7 +14044,7 @@ detailed bugfix information):
the additional thunking on the foreach to get from holer to
holder->tcb. An alternate approach could be to leve the interface
the same and allocate a holder on the stack of sem_restoreholderprioB
copy the sem's holder to it, free it as is done in this pr and and
copy the sem's holder to it, free it as is done in this pr and
then pass that address sem_restoreholderprio as the holder. It could
then get the holder's tcb but we would keep the same sem_findholder
in sched_verifytcb. From David Sidrane.
@ -14361,7 +14361,7 @@ detailed bugfix information):
Thus this combination only does following: RTS is asserted on USART
setup and deasserted on shutdown and does not perform actual RTS
flow-control. Data loss can be demonstrated by doing long up_mdelay
inside irq critical section and feeding data to RXDMA+IFLOWCONTROL
inside IRQ critical section and feeding data to RXDMA+IFLOWCONTROL
UART. From Jussi Kivilinna.
- STM32 F7 Serial: Do not stop processing input in SW flow-control
mode. From Jussi Kivilinna.
@ -15073,7 +15073,7 @@ Additional new features and extended functionality:
calls to support multiple composite device configurations dynamically.
- apps/system/composite: Remove references to USBMSC. There still
dependencies on CDC/ACM in the serial USB trace output.
- apps/system/telnet: Add Telnet Chat deamon and and client from
- apps/system/telnet: Add Telnet Chat deamon and client from
libtelent.
* Platform-Specific Support (apps/platform)
@ -15831,7 +15831,7 @@ Additional new features and extended functionality:
power measurement. From Sebastien Lorquet.
- PCA9555: The IRQ subsystem now supports passing a void * parameter
to IRQ handlers. Use that method to support multiple PCA9555
devices, by passing a pointer to the device to the board defined irq
devices, by passing a pointer to the device to the board defined IRQ
handler. Now the CONFIG_ for multiple PCA devices just allocates
device structures dynamically instead of statically when not enabled.
The same interrupt handler is entered with the device structure
@ -18307,7 +18307,7 @@ Additional new features and extended functionality:
- Signals: Update signal default STOP action. If waitpid was
called with the WUNTRACED then wake up waitpid(). From Gregory
Nutt.
- IRQs: Monitor the irq execution time. This is very useful for
- IRQs: Monitor the IRQ execution time. This is very useful for
measuring the interrupt latency. From Xiang Xiao.
- IRQ Dispatch: Add support interrupt chains in NuttX. IRQ chain is
very useful in these cases: (1) Multiple hardware connect to the
@ -21288,7 +21288,7 @@ detailed bugfix information):
to be set by board-specific logic. From Gregory Nutt
- Memory Management: Revert "This patch prevent heap corruption as in
below case." This solution to the problem noted by EunBong Song
results in major memory fragmentation and and out-of-memory
results in major memory fragmentation and out-of-memory
conditions on the PX4 platform. On that platform the lower priority
work queue is very low priority and essentially never runs when the
system is busy. As a result, the systems gets slowly starved of
@ -22094,7 +22094,7 @@ Additional new features and extended functionality:
STM32L4. From Juha Niskanen (Haltian).
- STM32H7 I2C: Apply David Sidrane's fix for the STM32F7 to the
STM32H7. From Gregory Nutt.
- STM32H7 DMA: Rename DMA1/2 irq names to match those from other
- STM32H7 DMA: Rename DMA1/2 IRQ names to match those from other
STM32. Add auxiliary definitions. Add DMAMAP definitions for
MDMA, DMA1, DMA2 and BDMA. Add some address blocks. Change RCC
definitions to match other STM32 ports. Enable clock for MDMA and
@ -25809,7 +25809,7 @@ Additional new features and extended functionality:
* Renesas RX65N:
- RX65N: Adds a port of to the Renesas RX65N Micro-controller. This
port includes Serial (UART) driver (13 ports) and and Ethernet
port includes Serial (UART) driver (13 ports) and Ethernet
driver. From Anjana.
* Renesas RX65N Boards:
@ -25827,7 +25827,7 @@ Additional new features and extended functionality:
- CXD56xx SMP: Add support for SMP. To run cxd56xx in SMP mode, new
boot loader which will be released later must be used. From
Masayuki Ishikawa.
- CXD56xx SMP: Add irq routing for SMP in cxd56_irq.c. In CXD56xx,
- CXD56xx SMP: Add IRQ routing for SMP in cxd56_irq.c. In CXD56xx,
each external interrupt controller can be accessed from a local
APP_DSP (Cortex-M4F) only. This change supports IRQ routing for SMP
by calling up_send_irqreq() in both up_enable_irq() and
@ -25936,14 +25936,14 @@ Additional new features and extended functionality:
maximum frequency. From Daniel Pereira Volpato.
- Nucleo-G070RB: Enable basic timers. Add TIMx clock frequencies to
board.h. From Daniel Pereira Volpato.
- Nucleo-L476RG: Add required definitions if libcxx is enabled. From
Matias N.
- Nucleo-L476RG: Add support for LPTIM timers as PWM outputs. From
Matias N.
- Nucleo-G070RB: Add PWM support and GPIO_TIM3_* mappings. Add a PWM
configuration. From Daniel Pereira Volpato.
- Nucleo-G070RB: Add button driver support, Add driver support. Add
GPIO configuration. From Daniel Pereira Volpato.
- Nucleo-L476RG: Add required definitions if libcxx is enabled. From
Matias N.
- Nucleo-L476RG: Add support for LPTIM timers as PWM outputs. From
Matias N.
- Nucleo-H743ZI: Added GPIO device driver for user-space apps. From
Heiko Demlang.
- olimex-stm32-e407: Newer Olimex E407 boards are populated with
@ -25961,7 +25961,7 @@ Additional new features and extended functionality:
- TM4C129ENCPDT: Add support for Tiva TM4C129ENCPDT. From Nathan
Hartman.
* TI Tiva Drivers:
* TI Tiva Boards:
- TM4C123G-Launchpad: SPI CAN functionality on TM4C123GXL. From
DisruptiveNL.