From 61555fe5e1b683f90754ebcb44fbaf544e5d8d3b Mon Sep 17 00:00:00 2001 From: Gregory Nutt Date: Tue, 22 Apr 2014 09:01:20 -0600 Subject: [PATCH] Various SAM4S related fixes, mostely related to the timer driver driver and the SAM4S timer/counter. All from Bob Doisin --- ChangeLog | 3 ++ Kconfig | 9 ++++ arch/arm/src/sam34/Kconfig | 8 +-- arch/arm/src/sam34/Make.defs | 4 ++ arch/arm/src/sam34/chip/sam4s_memorymap.h | 15 +++--- arch/arm/src/sam34/chip/sam_tc.h | 42 +++++++++++----- arch/arm/src/sam34/chip/sam_uart.h | 2 +- arch/arm/src/sam34/sam_timerisr.c | 1 + arch/arm/src/sam34/sam_wdt.c | 2 + configs/sam4s-xplained-pro/include/board.h | 1 + configs/sam4s-xplained-pro/src/Makefile | 3 ++ .../src/sam4s-xplained-pro.h | 2 +- configs/sam4s-xplained-pro/src/sam_nsh.c | 20 ++++++-- configs/sam4s-xplained-pro/src/sam_wdt.c | 1 + drivers/Kconfig | 8 +++ drivers/Makefile | 4 ++ drivers/timer.c | 50 ++++++++++--------- include/nuttx/fs/ioctl.h | 6 +++ include/nuttx/timer.h | 18 ++++--- sched/sem_timedwait.c | 2 +- 20 files changed, 140 insertions(+), 61 deletions(-) diff --git a/ChangeLog b/ChangeLog index 706ef2798e..68b5189ed4 100644 --- a/ChangeLog +++ b/ChangeLog @@ -7239,4 +7239,7 @@ Doison (2014-4-21). * nuttx/configs/sam4s-xplained-pro: Add board-specific watchdog timer support. From Bob Doison (2014-4-21). + * drivers/timer.c and include/nuttx/timer.h: Timer "upper half" + driver and lower half interface definition from Bob Doison + (2014-40-22). diff --git a/Kconfig b/Kconfig index b210b80e9c..21fcd9c136 100644 --- a/Kconfig +++ b/Kconfig @@ -597,6 +597,15 @@ config DEBUG_WATCHDOG Support for this debug option is architecture-specific and may not be available for some MCUs. +config DEBUG_TIMER + bool "Timer Debug Output" + default n + depends on TIMER + ---help--- + Enable timer debug SYSLOG output (disabled by default). + Support for this debug option is architecture-specific and may not + be available for some MCUs. + config DEBUG_AUDIO bool "Audio Device Debug Output" default n diff --git a/arch/arm/src/sam34/Kconfig b/arch/arm/src/sam34/Kconfig index 4b7e31e11a..ad076de882 100644 --- a/arch/arm/src/sam34/Kconfig +++ b/arch/arm/src/sam34/Kconfig @@ -1214,14 +1214,14 @@ config WDT_DISABLE_ON_RESET config WDT_TIMEOUT int "Watchdog Timeout (ms)" - default 4000 + default 5000 depends on !WDT_DISABLE_ON_RESET ---help--- Watchdog timeout value in milliseconds. config WDT_MINTIME int "Watchdog Minimum Time (ms)" - default 2000 + default 2500 depends on !WDT_DISABLE_ON_RESET ---help--- Minimum watchdog kick interval @@ -1239,11 +1239,11 @@ config WDT_THREAD_NAME config WDT_THREAD_INTERVAL int "Watchdog Thread Interval (ms)" - default 2000 + default 2500 config WDT_THREAD_PRIORITY int "Watchdog Thread Priority" - default 99 + default 200 config WDT_THREAD_STACKSIZE int "Watchdog Thread Stacksize" diff --git a/arch/arm/src/sam34/Make.defs b/arch/arm/src/sam34/Make.defs index cfaa0724c9..efd7e23267 100644 --- a/arch/arm/src/sam34/Make.defs +++ b/arch/arm/src/sam34/Make.defs @@ -137,3 +137,7 @@ endif ifeq ($(CONFIG_SAM34_WDT),y) CHIP_CSRCS += sam_wdt.c endif + +ifeq ($(CONFIG_TIMER),y) +CHIP_CSRCS += sam_tc.c +endif diff --git a/arch/arm/src/sam34/chip/sam4s_memorymap.h b/arch/arm/src/sam34/chip/sam4s_memorymap.h index 7ff388df67..e250b0981b 100644 --- a/arch/arm/src/sam34/chip/sam4s_memorymap.h +++ b/arch/arm/src/sam34/chip/sam4s_memorymap.h @@ -74,14 +74,15 @@ #define SAM_SPI0_BASE 0x40008000 /* 0x40008000-0x4000bfff: Serial Peripheral Interface */ /* 0x4000c000-0x4000ffff: Reserved */ #define SAM_TC012_BASE 0x40010000 /* 0x40010000-0x400100bf: Timer Counters 0-2 */ -# define SAM_TC0_BASE 0x40080000 /* 0x40010000-0x4001003f: Timer Counter 0 */ -# define SAM_TC1_BASE 0x40080040 /* 0x40010040-0x4001007f: Timer Counter 1 */ -# define SAM_TC2_BASE 0x40080080 /* 0x40010080-0x400100bf: Timer Counter 2 */ +# define SAM_TC0_BASE 0x40010000 /* 0x40010000-0x4001003f: Timer Counter 0 */ +# define SAM_TC1_BASE 0x40010040 /* 0x40010040-0x4001007f: Timer Counter 1 */ +# define SAM_TC2_BASE 0x40010080 /* 0x40010080-0x400100bf: Timer Counter 2 */ /* 0x400100c0-0x40013fff Reserved */ -#define SAM_TC345_BASE 0x40080000 /* 0x40014000-0x400140bf: Timer Counters 3-5 */ -# define SAM_TC3_BASE 0x40080000 /* 0x40014000-0x4001403f: Timer Counter 3 */ -# define SAM_TC4_BASE 0x40080040 /* 0x40014040-0x4001407f: Timer Counter 4 */ -# define SAM_TC5_BASE 0x40080080 /* 0x40014080-0x400140bf: Timer Counter 5 */ +#define SAM_TC345_BASE 0x40014000 /* 0x40014000-0x400140bf: Timer Counters 3-5 */ +# define SAM_TC3_BASE 0x40014000 /* 0x40014000-0x4001403f: Timer Counter 3 */ +# define SAM_TC4_BASE 0x40014040 /* 0x40014040-0x4001407f: Timer Counter 4 */ +# define SAM_TC5_BASE 0x40014080 /* 0x40014080-0x400140bf: Timer Counter 5 */ + #define SAM_TWI_BASE 0x40018000 /* 0x40018000-0x4001ffff: Two-Wire Interface */ # define SAM_TWI0_BASE 0x40018000 /* 0x40018000-0x4001bfff: Two-Wire Interface 0 */ # define SAM_TWI1_BASE 0x4001c000 /* 0x4001c000-0x4001ffff: Two-Wire Interface 1 */ diff --git a/arch/arm/src/sam34/chip/sam_tc.h b/arch/arm/src/sam34/chip/sam_tc.h index db43e9a0fb..e2ec4f38e2 100644 --- a/arch/arm/src/sam34/chip/sam_tc.h +++ b/arch/arm/src/sam34/chip/sam_tc.h @@ -296,16 +296,31 @@ /* Timer common registers */ -#define SAM_TC_BCR (SAM_TC_BASE+SAM_TC_BCR_OFFSET) -#define SAM_TC_BMR (SAM_TC_BASE+SAM_TC_BMR_OFFSET) -#define SAM_TC_QIER (SAM_TC_BASE+SAM_TC_QIER_OFFSET) -#define SAM_TC_QIDR (SAM_TC_BASE+SAM_TC_QIDR_OFFSET) -#define SAM_TC_QIMR (SAM_TC_BASE+SAM_TC_QIMR_OFFSET) -#define SAM_TC_QISR (SAM_TC_BASE+SAM_TC_QISR_OFFSET) - #if defined(CONFIG_ARCH_CHIP_SAM4S) || defined(CONFIG_ARCH_CHIP_SAM4E) -# define SAM_TC_FMR (SAM_TC_BASE+SAM_TC_FMR_OFFSET) -# define SAM_TC_WPMR (SAM_TC_BASE+SAM_TC_WPMR_OFFSET) +# define SAM_TC0_BCR (SAM_TC0_BASE+SAM_TC_BCR_OFFSET) +# define SAM_TC0_BMR (SAM_TC0_BASE+SAM_TC_BMR_OFFSET) +# define SAM_TC0_QIER (SAM_TC0_BASE+SAM_TC_QIER_OFFSET) +# define SAM_TC0_QIDR (SAM_TC0_BASE+SAM_TC_QIDR_OFFSET) +# define SAM_TC0_QIMR (SAM_TC0_BASE+SAM_TC_QIMR_OFFSET) +# define SAM_TC0_QISR (SAM_TC0_BASE+SAM_TC_QISR_OFFSET) +# define SAM_TC0_FMR (SAM_TC0_BASE+SAM_TC_FMR_OFFSET) +# define SAM_TC0_WPMR (SAM_TC0_BASE+SAM_TC_WPMR_OFFSET) + +# define SAM_TC1_BCR (SAM_TC3_BASE+SAM_TC_BCR_OFFSET) +# define SAM_TC1_BMR (SAM_TC3_BASE+SAM_TC_BMR_OFFSET) +# define SAM_TC1_QIER (SAM_TC3_BASE+SAM_TC_QIER_OFFSET) +# define SAM_TC1_QIDR (SAM_TC3_BASE+SAM_TC_QIDR_OFFSET) +# define SAM_TC1_QIMR (SAM_TC3_BASE+SAM_TC_QIMR_OFFSET) +# define SAM_TC1_QISR (SAM_TC3_BASE+SAM_TC_QISR_OFFSET) +# define SAM_TC1_FMR (SAM_TC3_BASE+SAM_TC_FMR_OFFSET) +# define SAM_TC1_WPMR (SAM_TC3_BASE+SAM_TC_WPMR_OFFSET) +#else +# define SAM_TC_BCR (SAM_TC_BASE+SAM_TC_BCR_OFFSET) +# define SAM_TC_BMR (SAM_TC_BASE+SAM_TC_BMR_OFFSET) +# define SAM_TC_QIER (SAM_TC_BASE+SAM_TC_QIER_OFFSET) +# define SAM_TC_QIDR (SAM_TC_BASE+SAM_TC_QIDR_OFFSET) +# define SAM_TC_QIMR (SAM_TC_BASE+SAM_TC_QIMR_OFFSET) +# define SAM_TC_QISR (SAM_TC_BASE+SAM_TC_QISR_OFFSET) #endif /* TC register bit definitions ******************************************************************/ @@ -393,8 +408,8 @@ #define TC_CMR_WAVSEL_SHIFT (13) /* Bits 13-14: Waveform Selection (Waveform mode) */ #define TC_CMR_WAVSEL_MASK (3 << TC_CMR_WAVSEL_SHIFT) # define TC_CMR_WAVSEL_UP (0 << TC_CMR_WAVSEL_SHIFT) /* UP mode w/o auto trigger (Waveform mode) */ -# define TC_CMR_WAVSEL_UPAUTO (1 << TC_CMR_WAVSEL_SHIFT) /* UP mode with auto trigger (Waveform mode) */ -# define TC_CMR_WAVSEL_UPDWN (2 << TC_CMR_WAVSEL_SHIFT) /* UPDOWN mode w/o auto trigger (Waveform mode) */ +# define TC_CMR_WAVSEL_UPDWN (1 << TC_CMR_WAVSEL_SHIFT) /* UPDOWN mode w/o auto trigger (Waveform mode) */ +# define TC_CMR_WAVSEL_UPAUTO (2 << TC_CMR_WAVSEL_SHIFT) /* UP mode with auto trigger (Waveform mode) */ # define TC_CMR_WAVSEL_UPDWNAUTO (3 << TC_CMR_WAVSEL_SHIFT) /* UPDOWN mode with auto trigger (Waveform mode) */ #define TC_CMR_ACPA_SHIFT (16) /* Bits 16-17: RA Compare Effect on TIOA (Waveform mode) */ #define TC_CMR_ACPA_MASK (3 << TC_CMR_ACPA_SHIFT) @@ -488,6 +503,9 @@ #if defined(CONFIG_ARCH_CHIP_SAM4E) # define TC_INT_ENDRX (1 << 8) /* Bit 8: End of Receiver Transfer */ # define TC_INT_RXBUFF (1 << 9) /* Bit 9: Reception Buffer Full */ +# define TC_INT_ALL (TC_INT_COVFS + TC_INT_LOVRS + TC_INT_CPAS + TC_INT_CPBS + TC_INT_CPCS + TC_INT_LDRAS + TC_INT_LDRBS + TC_INT_ETRGS + TC_INT_ENDRX + TC_INT_RXBUFF) +#else +# define TC_INT_ALL (TC_INT_COVFS + TC_INT_LOVRS + TC_INT_CPAS + TC_INT_CPBS + TC_INT_CPCS + TC_INT_LDRAS + TC_INT_LDRBS + TC_INT_ETRGS) #endif #define TC_INT_CLKSTA (1 << 16) /* Bit 16: Clock Enabling (SR only) */ @@ -511,7 +529,7 @@ /* Timer common registers ***********************************************************************/ /* TC Block Control Register */ -#define TC_BCR_SYNC (1 << 0) /* Bit 0: Synchro Command +#define TC_BCR_SYNC (1 << 0) /* Bit 0: Synchro Command */ /* TC Block Mode Register */ diff --git a/arch/arm/src/sam34/chip/sam_uart.h b/arch/arm/src/sam34/chip/sam_uart.h index 954693b608..81ffae4af0 100644 --- a/arch/arm/src/sam34/chip/sam_uart.h +++ b/arch/arm/src/sam34/chip/sam_uart.h @@ -387,7 +387,7 @@ #if defined(CONFIG_ARCH_CHIP_SAM3X) || defined(CONFIG_ARCH_CHIP_SAM3A) # define UART_INT_ALLINTS 0x3f08ffff #elif defined(CONFIG_ARCH_CHIP_SAM4S) -# define UART_INT_ALLINTS 0x010f3fff +# define UART_INT_ALLINTS 0x010f3fff /* USART - UART only has 0x001AFB? does it matter? */ #else # define UART_INT_ALLINTS 0x01083fff #endif diff --git a/arch/arm/src/sam34/sam_timerisr.c b/arch/arm/src/sam34/sam_timerisr.c index 22ef9bd9de..a6469cfcf0 100644 --- a/arch/arm/src/sam34/sam_timerisr.c +++ b/arch/arm/src/sam34/sam_timerisr.c @@ -163,6 +163,7 @@ void up_timerinit(void) /* Configure SysTick to interrupt at the requested rate */ putreg32(SYSTICK_RELOAD, NVIC_SYSTICK_RELOAD); + putreg32(0, NVIC_SYSTICK_CURRENT); /* Attach the timer interrupt vector */ diff --git a/arch/arm/src/sam34/sam_wdt.c b/arch/arm/src/sam34/sam_wdt.c index 4fce57a571..41e0184148 100644 --- a/arch/arm/src/sam34/sam_wdt.c +++ b/arch/arm/src/sam34/sam_wdt.c @@ -662,6 +662,7 @@ static int sam34_ioctl(FAR struct watchdog_lowerhalf_s *lower, int cmd, * ****************************************************************************/ +#ifndef CONFIG_WDT_DISABLE_ON_RESET void sam_wdtinitialize(FAR const char *devpath) { FAR struct sam34_lowerhalf_s *priv = &g_wdgdev; @@ -696,5 +697,6 @@ void sam_wdtinitialize(FAR const char *devpath) (void)watchdog_register(devpath, (FAR struct watchdog_lowerhalf_s *)priv); } +#endif /* CONFIG_WDT_DISABLE_ON_RESET */ #endif /* CONFIG_WATCHDOG && CONFIG_SAM34_WDT */ diff --git a/configs/sam4s-xplained-pro/include/board.h b/configs/sam4s-xplained-pro/include/board.h index 05de1ea671..406efc17f3 100644 --- a/configs/sam4s-xplained-pro/include/board.h +++ b/configs/sam4s-xplained-pro/include/board.h @@ -41,6 +41,7 @@ ************************************************************************************/ #include +#include #ifndef __ASSEMBLY__ # include diff --git a/configs/sam4s-xplained-pro/src/Makefile b/configs/sam4s-xplained-pro/src/Makefile index 15501d49ef..e3ebc842f8 100644 --- a/configs/sam4s-xplained-pro/src/Makefile +++ b/configs/sam4s-xplained-pro/src/Makefile @@ -72,6 +72,9 @@ ifeq ($(CONFIG_SAM34_WDT),y) CSRCS += sam_wdt.c endif +ifeq ($(CONFIG_TIMER),y) +CSRCS += sam_tc.c +endif COBJS = $(CSRCS:.c=$(OBJEXT)) diff --git a/configs/sam4s-xplained-pro/src/sam4s-xplained-pro.h b/configs/sam4s-xplained-pro/src/sam4s-xplained-pro.h index 9226f2d0d7..e4a6fc4ca1 100644 --- a/configs/sam4s-xplained-pro/src/sam4s-xplained-pro.h +++ b/configs/sam4s-xplained-pro/src/sam4s-xplained-pro.h @@ -57,7 +57,7 @@ #define HAVE_HSMCI 1 #define HAVE_PROC 1 -#define HAVE_USBDEV 1 +#define HAVE_USBDEV 0 #undef HAVE_USBMONITOR /* HSMCI */ diff --git a/configs/sam4s-xplained-pro/src/sam_nsh.c b/configs/sam4s-xplained-pro/src/sam_nsh.c index 92b1ff8aa4..60b1aee82e 100644 --- a/configs/sam4s-xplained-pro/src/sam_nsh.c +++ b/configs/sam4s-xplained-pro/src/sam_nsh.c @@ -45,10 +45,9 @@ #include #include #include +#include -#ifdef CONFIG_SYSTEM_USBMONITOR -# include -#endif +#include #ifdef CONFIG_CDCACM # include @@ -58,6 +57,14 @@ # include #endif +#ifdef CONFIG_TIMER +# include +#endif + +#ifdef CONFIG_SYSTEM_USBMONITOR +# include +#endif + #include "sam4s-xplained-pro.h" /**************************************************************************** @@ -134,7 +141,6 @@ int nsh_archinitialize(void) } #endif -#warning "add automount config...." message("Mounting /dev/mmcsd0 to /fat\n"); ret = mount("/dev/mmcsd0", "/fat", "vfat", 0, NULL); if (ret < 0) @@ -143,5 +149,11 @@ int nsh_archinitialize(void) return ret; } +#ifdef CONFIG_TIMER + /* Registers the timer driver and starts an async interrupt. */ + + up_timerinitialize(); +#endif + return OK; } diff --git a/configs/sam4s-xplained-pro/src/sam_wdt.c b/configs/sam4s-xplained-pro/src/sam_wdt.c index 8423e802dc..e78a12023f 100644 --- a/configs/sam4s-xplained-pro/src/sam_wdt.c +++ b/configs/sam4s-xplained-pro/src/sam_wdt.c @@ -139,6 +139,7 @@ static int wdog_daemon(int argc, char *argv[]) goto errout_with_dev; } + usleep(200); while(1) { usleep((CONFIG_WDT_THREAD_INTERVAL)*1000); diff --git a/drivers/Kconfig b/drivers/Kconfig index 329b4ddc0d..5277873dac 100644 --- a/drivers/Kconfig +++ b/drivers/Kconfig @@ -247,6 +247,14 @@ config WATCHDOG_DEVPATH endif # WATCHDOG +menuconfig TIMER + bool "Timer Support" + default n + ---help--- + This selection enables building of the "upper-half" timer + driver. See include/nuttx/timer.h for further timer driver + information. + menuconfig ANALOG bool "Analog Device(ADC/DAC) Support" default n diff --git a/drivers/Makefile b/drivers/Makefile index 57ef003408..e4576ac57d 100644 --- a/drivers/Makefile +++ b/drivers/Makefile @@ -87,6 +87,10 @@ endif ifeq ($(CONFIG_WATCHDOG),y) CSRCS += watchdog.c endif + +ifeq ($(CONFIG_TIMER),y) + CSRCS += timer.c +endif endif AOBJS = $(ASRCS:.S=$(OBJEXT)) diff --git a/drivers/timer.c b/drivers/timer.c index 6d7b27f6b8..e141592152 100644 --- a/drivers/timer.c +++ b/drivers/timer.c @@ -1,7 +1,7 @@ /**************************************************************************** * drivers/timer.c * - * Copyright (C) 2012 Gregory Nutt. All rights reserved. + * Copyright (C) 2014 Gregory Nutt. All rights reserved. * Author: Gregory Nutt * * Redistribution and use in source and binary forms, with or without @@ -83,7 +83,7 @@ struct timer_upperhalf_s { uint8_t crefs; /* The number of times the device has been opened */ -// sem_t exclsem; /* Supports mutual exclusion */ +//sem_t exclsem; /* Supports mutual exclusion */ FAR char *path; /* Registration path */ /* The contained lower-half driver */ @@ -114,10 +114,10 @@ static const struct file_operations g_timerops = timer_close, /* close */ timer_read, /* read */ timer_write, /* write */ - 0, /* seek */ + 0, /* seek */ timer_ioctl /* ioctl */ #ifndef CONFIG_DISABLE_POLL - , 0 /* poll */ + , 0 /* poll */ #endif }; @@ -155,7 +155,7 @@ static int timer_open(FAR struct file *filep) * time that the driver has been opened for this device, then initialize * the device. */ -#warning "anythin init to do on first open?" + tmp = upper->crefs + 1; if (tmp == 0) { @@ -230,7 +230,7 @@ errout: static ssize_t timer_read(FAR struct file *filep, FAR char *buffer, size_t buflen) { /* Return zero -- usually meaning end-of-file */ -#warning "return counter value?" + return 0; } @@ -242,7 +242,8 @@ static ssize_t timer_read(FAR struct file *filep, FAR char *buffer, size_t bufle * ************************************************************************************/ -static ssize_t timer_write(FAR struct file *filep, FAR const char *buffer, size_t buflen) +static ssize_t timer_write(FAR struct file *filep, FAR const char *buffer, + size_t buflen) { return 0; } @@ -287,15 +288,14 @@ static int timer_ioctl(FAR struct file *filep, int cmd, unsigned long arg) { /* Start the timer, resetting the time to the current timeout */ - //DEBUGASSERT(lower->ops->start); /* Required */ - if(lower->ops->start) - { - ret = lower->ops->start(lower); - } - else - { + if(lower->ops->start) + { + ret = lower->ops->start(lower); + } + else + { ret = -ENOSYS; - } + } } break; @@ -308,15 +308,14 @@ static int timer_ioctl(FAR struct file *filep, int cmd, unsigned long arg) { /* Stop the timer */ - //DEBUGASSERT(lower->ops->stop); /* Required */ - if(lower->ops->start) - { - ret = lower->ops->stop(lower); - } - else - { + if(lower->ops->start) + { + ret = lower->ops->stop(lower); + } + else + { ret = -ENOSYS; - } + } } break; @@ -353,8 +352,11 @@ static int timer_ioctl(FAR struct file *filep, int cmd, unsigned long arg) /* cmd: TCIOC_SETTIMEOUT * Description: Reset the timeout to this value * Argument: A 32-bit timeout value in microseconds. + * + * TODO: pass pointer to uint64 ns? Need to determine if these timers + * are 16 or 32 bit... */ -#warning "TODO - pass pointer to uint64 ns? Need to determine if these timers are 16 or 32 bit..." + case TCIOC_SETTIMEOUT: { /* Set a new timeout value (and reset the timer) */ diff --git a/include/nuttx/fs/ioctl.h b/include/nuttx/fs/ioctl.h index 7baf2fd49b..25c3c6d956 100644 --- a/include/nuttx/fs/ioctl.h +++ b/include/nuttx/fs/ioctl.h @@ -70,6 +70,7 @@ #define _SLCDIOCBASE (0x1100) /* Segment LCD ioctl commands */ #define _WLIOCBASE (0x1200) /* Wireless modules ioctl commands */ #define _CFGDIOCBASE (0x1300) /* Config Data device (app config) ioctl commands */ +#define _TCIOCBASE (0x1400) /* Timer ioctl commands */ /* Macros used to manage ioctl commands */ @@ -93,6 +94,11 @@ #define _WDIOCVALID(c) (_IOC_TYPE(c)==_WDIOCBASE) #define _WDIOC(nr) _IOC(_WDIOCBASE,nr) +/* Timer driver ioctl commands *******************************************/ + +#define _TCIOCVALID(c) (_IOC_TYPE(c)==_TCIOCBASE) +#define _TCIOC(nr) _IOC(_TCIOCBASE,nr) + /* NuttX file system ioctl definitions **************************************/ #define _FIOCVALID(c) (_IOC_TYPE(c)==_FIOCBASE) diff --git a/include/nuttx/timer.h b/include/nuttx/timer.h index b8fba163d9..82776a6a6d 100644 --- a/include/nuttx/timer.h +++ b/include/nuttx/timer.h @@ -1,7 +1,7 @@ /**************************************************************************** * include/nuttx/timer.h * - * Copyright (C) 2012 Gregory Nutt. All rights reserved. + * Copyright (C) 2014 Gregory Nutt. All rights reserved. * Author: Gregory Nutt * * Redistribution and use in source and binary forms, with or without @@ -68,8 +68,11 @@ * Argument: A 32-bit timeout value in microseconds. * TCIOC_CAPTURE - Do not reset. Instead, called this handler. * Argument: A pointer to struct timer_capture_s. + * + * WARNING: May change TCIOC_SETTIMEOUT to pass pointer to 64bit nanoseconds + * or timespec structure. */ -#warning "may change TCIOC_SETTIMEOUT to pass pointer to 64bit nanoseconds or timespec structure" + #define TCIOC_START _TCIOC(0x001) #define TCIOC_STOP _TCIOC(0x002) #define TCIOC_GETSTATUS _TCIOC(0x003) @@ -174,7 +177,8 @@ struct timer_lowerhalf_s #ifdef __cplusplus #define EXTERN extern "C" -extern "C" { +extern "C" +{ #else #define EXTERN extern #endif @@ -212,8 +216,8 @@ extern "C" { * ****************************************************************************/ -EXTERN FAR void *timer_register(FAR const char *path, - FAR struct timer_lowerhalf_s *lower); +FAR void *timer_register(FAR const char *path, + FAR struct timer_lowerhalf_s *lower); /**************************************************************************** * Name: timer_unregister @@ -230,7 +234,7 @@ EXTERN FAR void *timer_register(FAR const char *path, * ****************************************************************************/ -EXTERN void timer_unregister(FAR void *handle); +void timer_unregister(FAR void *handle); /**************************************************************************** * Platform-Independent "Lower-Half" Timer Driver Interfaces @@ -259,7 +263,7 @@ EXTERN void timer_unregister(FAR void *handle); * ****************************************************************************/ -EXTERN int up_timerinitialize(void); +int up_timerinitialize(void); #undef EXTERN #ifdef __cplusplus diff --git a/sched/sem_timedwait.c b/sched/sem_timedwait.c index 572d779602..154f1d92a3 100644 --- a/sched/sem_timedwait.c +++ b/sched/sem_timedwait.c @@ -209,7 +209,7 @@ int sem_timedwait(FAR sem_t *sem, FAR const struct timespec *abstime) /* Try to take the semaphore without waiting. */ ret = sem_trywait(sem); - if (ret == 0) + if (ret == OK) { /* We got it! */