Style and comment fixes, more definitions in terms of constants for better clarity

This commit is contained in:
Henry Rovner 2024-06-22 11:57:42 -07:00 committed by Xiang Xiao
parent 210ea76b04
commit 5a7cf6ccad
2 changed files with 30 additions and 11 deletions

View File

@ -31,16 +31,31 @@
/* Map RISC-V exception code to NuttX IRQ */
#define NR_IRQS (RISCV_IRQ_SEXT + 114)
#define BL808_IRQ_NUM_BASE (16)
#define BL808_M0_IRQ_OFFSET (64) // IRQs tied to M0 core are given a virtual IRQ number
/* IRQs tied to M0 core are given a virtual IRQ number.
* Offset of 67 chosen to avoid overlap with highest D0
* IRQ, the PDS interrupt.
*/
#define BL808_M0_IRQ_OFFSET (67)
#define BL808_D0_MAX_EXTIRQ (BL808_IRQ_NUM_BASE + 66)
#define BL808_M0_MAX_EXTIRQ (BL808_IRQ_NUM_BASE + 63)
/* NR_IRQs corresponds to highest possible
* interrupt number, WIFI IPC IRQ on M0.
*/
#define NR_IRQS (RISCV_IRQ_SEXT + BL808_M0_IRQ_OFFSET + BL808_M0_MAX_EXTIRQ)
/* D0 IRQs ******************************************************************/
#define BL808_IRQ_UART3 (RISCV_IRQ_SEXT + BL808_IRQ_NUM_BASE + 4)
#define BL808_IRQ_D0_IPC (RISCV_IRQ_SEXT + BL808_IRQ_NUM_BASE + 38)
/* M0 IRQs ******************************************************************/
#define BL808_IRQ_UART0 (RISCV_IRQ_SEXT + BL808_IRQ_NUM_BASE + BL808_M0_IRQ_OFFSET + 28)
#define BL808_IRQ_UART1 (RISCV_IRQ_SEXT + BL808_IRQ_NUM_BASE + BL808_M0_IRQ_OFFSET + 29)
#define BL808_IRQ_UART2 (RISCV_IRQ_SEXT + BL808_IRQ_NUM_BASE + BL808_M0_IRQ_OFFSET + 30)

View File

@ -132,14 +132,16 @@ void up_disable_irq(int irq)
{
extirq = irq - RISCV_IRQ_EXT;
/* Clear enable bit for the irq */
if (0 <= extirq && extirq <= 63)
if (0 <= extirq && extirq <= BL808_D0_MAX_EXTIRQ)
{
/* Clear enable bit for the irq */
modifyreg32(BL808_PLIC_ENABLE1 + (4 * (extirq / 32)),
1 << (extirq % 32), 0);
}
else if (64 <= extirq && extirq <= 127)
else if ((BL808_D0_MAX_EXTIRQ + 1) <= extirq
&& extirq <= (BL808_M0_MAX_EXTIRQ
+ BL808_M0_IRQ_OFFSET))
{
int m0_extirq = extirq - BL808_M0_IRQ_OFFSET;
bl808_courier_req_irq_disable(m0_extirq);
@ -179,14 +181,16 @@ void up_enable_irq(int irq)
{
extirq = irq - RISCV_IRQ_EXT;
/* Set enable bit for the irq */
if (0 <= extirq && extirq <= 63)
if (0 <= extirq && extirq <= BL808_D0_MAX_EXTIRQ)
{
/* Set enable bit for the irq */
modifyreg32(BL808_PLIC_ENABLE1 + (4 * (extirq / 32)),
0, 1 << (extirq % 32));
}
else if (64 <= extirq && extirq <= 127)
else if ((BL808_D0_MAX_EXTIRQ + 1) <= extirq
&& extirq <= (BL808_M0_MAX_EXTIRQ
+ BL808_M0_IRQ_OFFSET))
{
int m0_extirq = extirq - BL808_M0_IRQ_OFFSET;
bl808_courier_req_irq_enable(m0_extirq);