From 5a7b2757aa93bb5ef652ee98bf3b8e936a764289 Mon Sep 17 00:00:00 2001
From: Gregory Nutt <gnutt@nuttx.org>
Date: Sun, 19 Jul 2015 13:09:48 -0600
Subject: [PATCH] Add definitions for SMSC LAN8742A PHY

---
 drivers/net/Kconfig     | 3 +++
 include/nuttx/net/mii.h | 7 ++++++-
 2 files changed, 9 insertions(+), 1 deletion(-)

diff --git a/drivers/net/Kconfig b/drivers/net/Kconfig
index 6b5f14902e..2c7e6d4745 100644
--- a/drivers/net/Kconfig
+++ b/drivers/net/Kconfig
@@ -349,6 +349,9 @@ config ETH0_PHY_LAN8740
 config ETH0_PHY_LAN8740A
 	bool "SMSC LAN8740A PHY"
 
+config ETH0_PHY_LAN8742A
+	bool "SMSC LAN8742A PHY"
+
 config ETH0_PHY_DM9161
 	bool "Davicom DM9161 PHY"
 
diff --git a/include/nuttx/net/mii.h b/include/nuttx/net/mii.h
index 6ac4dbc869..9d10beb32f 100644
--- a/include/nuttx/net/mii.h
+++ b/include/nuttx/net/mii.h
@@ -169,7 +169,7 @@
 #define MII_LAN8720_IMR              0x1e      /* Interrupt Mask Register */
 #define MII_LAN8720_SCSR             0x1f      /* PHY Special Control/Status Register */
 
-/* SMSC LAN8740 PHY Extended Registers */
+/* SMSC LAN8740/LAN8742A PHY Extended Registers */
 
 #define MII_LAN8740_CONFIG           0x10      /* EDPD NDL/Crossover Timer/EEE Configuration */
 #define MII_LAN8740_MCSR             0x11      /* Mode Control/Status Register */
@@ -361,6 +361,11 @@
 #define MII_PHYID1_LAN8740A          0x0007    /* ID1 value for LAN8740A */
 #define MII_PHYID2_LAN8740A          0xc111    /* ID2 value for LAN8740A */
 
+/* SMSC LAN8742A MII ID1/2 register bits */
+
+#define MII_PHYID1_LAN8742A          0x0007    /* ID1 value for LAN8742A */
+#define MII_PHYID2_LAN8742A          0xc130    /* ID2 value for LAN8742A */
+
 /* Am79c874-specific register bit settings **********************************/
 /* Am79c874 MII ID1/2 register bits */