risc-v/esp32c3: Disable access to invalid memory regions using MPU
Signed-off-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>
This commit is contained in:
Gustavo Henrique Nihei
Xiang Xiao
parent
88bfadc55d
commit
5805ad3954
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@ -156,6 +156,13 @@ config ESP32C3_CPU_FREQ_MHZ
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default 80 if ESP32C3_CPU_FREQ_80
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default 160 if ESP32C3_CPU_FREQ_160
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config ESP32C3_REGION_PROTECTION
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bool "Enable region protection"
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default y
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select ARCH_USE_MPU
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---help---
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Configure the MPU to disable access to invalid memory regions.
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config ESP32C3_RT_TIMER
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bool "Real-time Timer"
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default n
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@ -41,6 +41,10 @@ CHIP_CSRCS += esp32c3_lowputc.c esp32c3_serial.c
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CHIP_CSRCS += esp32c3_systemreset.c esp32c3_resetcause.c
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CHIP_CSRCS += esp32c3_uid.c
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ifeq ($(CONFIG_ESP32C3_REGION_PROTECTION),y)
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CHIP_CSRCS += esp32c3_region.c
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endif
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ifeq ($(CONFIG_BUILD_PROTECTED),y)
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CHIP_CSRCS += esp32c3_userspace.c
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endif
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@ -0,0 +1,183 @@
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/****************************************************************************
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* arch/risc-v/src/esp32c3/esp32c3_region.c
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*
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* Licensed to the Apache Software Foundation (ASF) under one or more
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* contributor license agreements. See the NOTICE file distributed with
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* this work for additional information regarding copyright ownership. The
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* ASF licenses this file to you under the Apache License, Version 2.0 (the
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* "License"); you may not use this file except in compliance with the
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* License. You may obtain a copy of the License at
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*
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* http://www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
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* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
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* License for the specific language governing permissions and limitations
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* under the License.
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*
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****************************************************************************/
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/****************************************************************************
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* Included Files
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****************************************************************************/
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#include <nuttx/config.h>
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#include <assert.h>
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#include <stdint.h>
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#include "riscv_internal.h"
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#include "hardware/esp32c3_soc.h"
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/****************************************************************************
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* Pre-processor Definitions
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****************************************************************************/
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#ifdef CONFIG_BUILD_PROTECTED
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/* BUILD_PROTECTED also makes use of the ESP32-C3 PMP (MPU) for isolating
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* the Kernel from the Userspace.
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*/
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# error "ESP32C3_REGION_PROTECTION shall not be enabled with Protected Mode"
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#endif
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/****************************************************************************
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* Public Functions
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****************************************************************************/
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/****************************************************************************
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* Name: esp32c3_region_protection
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*
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* Description:
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* Configure the MPU to disable access to invalid memory regions.
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*
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* Input Parameters:
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* None.
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*
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* Returned Value:
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* None.
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*
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* Notes:
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* 1) ESP32-C3 CPU doesn't support overlapping PMP regions.
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* 2) Therefore, we use TOR (top of range) entries to map the whole address
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* space, bottom to top.
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* 3) There are not enough entries to describe all the memory regions 100%
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* accurately.
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* 4) This means some gaps (invalid memory) are accessible. Priority for
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* extending regions to cover gaps is to extend read-only or read-execute
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* regions or read-only regions only (executing unmapped addresses should
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* always fault with invalid instruction, read-only means stores will
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* correctly fault even if reads may return some invalid value).
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* 5) Entries are grouped in order with some static asserts to try and verify
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* everything is correct.
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*
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****************************************************************************/
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#ifdef CONFIG_ESP32C3_REGION_PROTECTION
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void esp32c3_region_protection(void)
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{
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const uintptr_t R = PMPCFG_L | PMPCFG_R;
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const uintptr_t RW = PMPCFG_L | PMPCFG_R | PMPCFG_W;
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const uintptr_t RX = PMPCFG_L | PMPCFG_R | PMPCFG_X;
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const uintptr_t RWX = PMPCFG_L | PMPCFG_R | PMPCFG_W | PMPCFG_X;
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/* 1. Gap at bottom of address space */
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riscv_config_pmp_region(0, PMPCFG_A_TOR, SOC_DEBUG_LOW, 0);
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/* 2. Debug region */
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riscv_config_pmp_region(1, PMPCFG_A_TOR | RWX, SOC_DEBUG_HIGH, 0);
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static_assert(SOC_DEBUG_LOW < SOC_DEBUG_HIGH, "Invalid CPU debug region");
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/* 3. Gap between debug region & DROM (flash cache) */
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riscv_config_pmp_region(2, PMPCFG_A_TOR, SOC_DROM_LOW, 0);
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static_assert(SOC_DEBUG_HIGH < SOC_DROM_LOW, "Invalid PMP entry order");
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/* 4. DROM (flash cache)
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* 5. Gap between DROM & DRAM
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* Note: To save PMP entries these two are merged into one read-only region
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*/
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riscv_config_pmp_region(3, PMPCFG_A_TOR | R, SOC_DRAM_LOW, 0);
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static_assert(SOC_DROM_LOW < SOC_DROM_HIGH, "Invalid DROM region");
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static_assert(SOC_DROM_HIGH < SOC_DRAM_LOW, "Invalid PMP entry order");
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/* 6. DRAM */
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riscv_config_pmp_region(4, PMPCFG_A_TOR | RW, SOC_DRAM_HIGH, 0);
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static_assert(SOC_DRAM_LOW < SOC_DRAM_HIGH, "Invalid DRAM region");
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/* 7. Gap between DRAM and Mask DROM
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* 8. Mask DROM
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* Note: to save PMP entries these two are merged into one read-only region
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*/
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riscv_config_pmp_region(5, PMPCFG_A_TOR | R, SOC_DROM_MASK_HIGH, 0);
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static_assert(SOC_DRAM_HIGH < SOC_DROM_MASK_LOW,
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"Invalid PMP entry order");
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static_assert(SOC_DROM_MASK_LOW < SOC_DROM_MASK_HIGH,
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"Invalid mask DROM region");
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/* 9. Gap between mask DROM and mask IROM
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* 10. Mask IROM
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* Note: to save PMP entries these two are merged into one RX region
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*/
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riscv_config_pmp_region(6, PMPCFG_A_TOR | RX, SOC_IROM_MASK_HIGH, 0);
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static_assert(SOC_DROM_MASK_HIGH < SOC_IROM_MASK_LOW,
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"Invalid PMP entry order");
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static_assert(SOC_IROM_MASK_LOW < SOC_IROM_MASK_HIGH,
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"Invalid mask IROM region");
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/* 11. Gap between mask IROM & IRAM */
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riscv_config_pmp_region(7, PMPCFG_A_TOR, SOC_IRAM_LOW, 0);
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static_assert(SOC_IROM_MASK_HIGH < SOC_IRAM_LOW,
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"Invalid PMP entry order");
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/* 12. IRAM */
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riscv_config_pmp_region(8, PMPCFG_A_TOR | RWX, SOC_IRAM_HIGH, 0);
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static_assert(SOC_IRAM_LOW < SOC_IRAM_HIGH, "Invalid IRAM region");
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/* 13. Gap between IRAM and IROM
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* 14. IROM (flash cache)
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* Note: to save PMP entries these two are merged into one RX region
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*/
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riscv_config_pmp_region(9, PMPCFG_A_TOR | RX, SOC_IROM_HIGH, 0);
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static_assert(SOC_IRAM_HIGH < SOC_IROM_LOW, "Invalid PMP entry order");
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static_assert(SOC_IROM_LOW < SOC_IROM_HIGH, "Invalid IROM region");
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/* 15. Gap between IROM & RTC slow memory */
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riscv_config_pmp_region(10, PMPCFG_A_TOR, SOC_RTC_RAM_LOW, 0);
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static_assert(SOC_IROM_HIGH < SOC_RTC_RAM_LOW, "Invalid PMP entry order");
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/* 16. RTC fast memory */
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riscv_config_pmp_region(11, PMPCFG_A_TOR | RWX, SOC_RTC_RAM_HIGH, 0);
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static_assert(SOC_RTC_RAM_LOW < SOC_RTC_RAM_HIGH,
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"Invalid RTC IRAM region");
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/* 17. Gap between RTC fast memory & peripheral addresses */
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riscv_config_pmp_region(12, PMPCFG_A_TOR, SOC_PERIPHERAL_LOW, 0);
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static_assert(SOC_RTC_RAM_HIGH < SOC_PERIPHERAL_LOW,
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"Invalid PMP entry order");
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/* 18. Peripheral addresses */
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riscv_config_pmp_region(13, PMPCFG_A_TOR | RW, SOC_PERIPHERAL_HIGH, 0);
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static_assert(SOC_PERIPHERAL_LOW < SOC_PERIPHERAL_HIGH,
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"Invalid peripheral region");
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/* 19. End of address space */
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riscv_config_pmp_region(14, PMPCFG_A_TOR, UINT32_MAX, 0);
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riscv_config_pmp_region(15, PMPCFG_A_NA4, UINT32_MAX, 0);
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}
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#endif
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@ -0,0 +1,71 @@
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/****************************************************************************
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* arch/risc-v/src/esp32c3/esp32c3_region.h
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*
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* Licensed to the Apache Software Foundation (ASF) under one or more
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* contributor license agreements. See the NOTICE file distributed with
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* this work for additional information regarding copyright ownership. The
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* ASF licenses this file to you under the Apache License, Version 2.0 (the
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* "License"); you may not use this file except in compliance with the
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* License. You may obtain a copy of the License at
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*
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* http://www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
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* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
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* License for the specific language governing permissions and limitations
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* under the License.
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*
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****************************************************************************/
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#ifndef __ARCH_RISCV_SRC_ESP32C3_ESP32C3_REGION_H
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#define __ARCH_RISCV_SRC_ESP32C3_ESP32C3_REGION_H
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/****************************************************************************
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* Included Files
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****************************************************************************/
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#include <nuttx/config.h>
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#ifndef __ASSEMBLY__
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/****************************************************************************
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* Public Data
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****************************************************************************/
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#ifdef __cplusplus
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#define EXTERN extern "C"
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extern "C"
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{
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#else
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#define EXTERN extern
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#endif
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/****************************************************************************
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* Public Function Prototypes
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****************************************************************************/
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/****************************************************************************
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* Name: esp32c3_region_protection
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*
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* Description:
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* Configure the MPU to disable access to invalid memory regions.
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*
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* Input Parameters:
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* None.
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*
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* Returned Value:
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* None.
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*
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****************************************************************************/
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void esp32c3_region_protection(void);
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#if defined(__cplusplus)
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}
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#endif
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#undef EXTERN
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#endif /* __ASSEMBLY__ */
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#endif /* __ARCH_RISCV_SRC_ESP32C3_ESP32C3_REGION_H */
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@ -36,6 +36,9 @@
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#include "esp32c3_clockconfig.h"
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#include "esp32c3_irq.h"
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#include "esp32c3_lowputc.h"
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#ifdef CONFIG_ESP32C3_REGION_PROTECTION
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#include "esp32c3_region.h"
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#endif
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#include "esp32c3_rtc.h"
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#include "esp32c3_start.h"
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#include "esp32c3_wdt.h"
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@ -243,6 +246,12 @@ void __esp32c3_start(void)
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#endif
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#ifdef CONFIG_ESP32C3_REGION_PROTECTION
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/* Configure region protection */
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esp32c3_region_protection();
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#endif
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/* Initialize RTC parameters */
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esp32c3_rtc_init();
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@ -5,6 +5,7 @@
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# You can then do "make savedefconfig" to generate a new defconfig file that includes your
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# modifications.
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#
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# CONFIG_ESP32C3_REGION_PROTECTION is not set
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# CONFIG_NSH_ARGCAT is not set
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# CONFIG_NSH_CMDOPT_HEXDUMP is not set
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# CONFIG_NSH_CMDPARMS is not set
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