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risc-v/bl808: Configure MMU to cache User Text, Data and Heap 

This PR configures the BL808 MMU to cache the the User Text, Data and Heap. We enable the T-Head MMU Flags for Shareable, Bufferable and Cacheable, as explained in the previous PR: https://github.com/apache/nuttx/pull/13199

This PR fixes the Slow Memory Access for NuttX Apps on Ox64 BL808 SBC: https://github.com/apache/nuttx/issues/12696. With this fix, Ox64 NuttX CoreMark jumps from 19 to 1,104. (Close to Buildroot Linux CoreMark)

Modified Files:

`arch/risc-v/Kconfig`: Enabled `ARCH_MMU_EXT_THEAD` for BL808 SoC.
This commit is contained in:
Lup Yuen Lee 2024-08-28 09:30:23 +08:00 committed by Xiang Xiao
parent 45625cbe3b
commit 4c35bde3ba
1 changed files with 1 additions and 0 deletions
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arch/risc-v/Kconfig
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@ -295,6 +295,7 @@ config ARCH_CHIP_BL808
select ARCH_HAVE_MULTICPU
select ARCH_HAVE_MPU
select ARCH_MMU_TYPE_SV39
select ARCH_MMU_EXT_THEAD
select ARCH_HAVE_ADDRENV
select ARCH_NEED_ADDRENV_MAPPING
select ARCH_HAVE_S_MODE