w25qxxxjv: fix STATUS2_QE_ENABLED bitfield write

W25QXXXJV_WRITE_STATUS_2 register uses just first byte therefore all
operations has to be done in priv->cmdbuf[0]. Previous priv->cmdbuf[1]
caused QuadSPI mode not being enabled.

Signed-off-by: Michal Lenc <michallenc@seznam.cz>
This commit is contained in:
Michal Lenc 2023-05-14 22:04:39 +02:00 committed by Xiang Xiao
parent c9a843bdca
commit 482cbc4363
1 changed files with 1 additions and 1 deletions

View File

@ -616,7 +616,7 @@ static void w25qxxxjv_quad_enable(FAR struct w25qxxxjv_dev_s *priv)
w25qxxxjv_write_enable(priv);
priv->cmdbuf[0] &= ~STATUS2_QE_MASK;
priv->cmdbuf[1] |= STATUS2_QE_ENABLED;
priv->cmdbuf[0] |= STATUS2_QE_ENABLED;
w25qxxxjv_command_write(priv->qspi, W25QXXXJV_WRITE_STATUS_2,
(FAR const void *)priv->cmdbuf, 1);