This completes the implementation of shared memory support
This commit is contained in:
Gregory Nutt
parent
7dcc39cf2b
commit
468097b3b9
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@ -88,18 +88,6 @@ extern "C"
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* Public Function Prototypes
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****************************************************************************/
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/****************************************************************************
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* Name: set_l2_entry
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*
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* Description:
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* Set the L2 table entry as part of the initialization of the L2 Page
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* table.
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*
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****************************************************************************/
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void set_l2_entry(FAR uint32_t *l2table, uintptr_t paddr, uintptr_t vaddr,
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uint32_t mmuflags);
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/****************************************************************************
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* Name: arm_addrenv_create_region
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*
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@ -40,9 +40,17 @@
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#include <nuttx/config.h>
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#include <stdint.h>
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#include <string.h>
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#include <errno.h>
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#include <nuttx/arch.h>
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#include <nuttx/sched.h>
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#include <nuttx/addrenv.h>
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#include "mmu.h"
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#include "cache.h"
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#include "addrenv.h"
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#include "pgalloc.h"
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#if defined(CONFIG_BUILD_KERNEL) && defined(CONFIG_MM_SHM)
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@ -83,8 +91,134 @@
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int up_shmat(FAR uintptr_t *pages, unsigned int npages, uintptr_t vaddr)
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{
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#warning Missing logic
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return -ENOSYS;
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FAR struct tcb_s *tcb = sched_self();
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FAR struct task_group_s *group;
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FAR uintptr_t *l1entry;
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FAR uint32_t *l2table;
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irqstate_t flags;
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uintptr_t paddr;
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#ifndef CONFIG_ARCH_PGPOOL_MAPPING
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uint32_t l1save;
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#endif
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unsigned int nmapped;
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unsigned int shmndx;
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shmvdbg("pages=%p npages=%d vaddr=%08lx\n",
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pages, npages, (unsigned long)vaddr);
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/* Sanity checks */
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DEBUGASSERT(pages && npages > 0 && tcb && tcb->group);
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DEBUGASSERT(vaddr >= CONFIG_ARCH_SHM_VBASE && vaddr < ARCH_SHM_VEND);
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DEBUGASSERT(MM_ISALIGNED(vaddr));
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group = tcb->group;
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/* Loop until all pages have been mapped into the caller's address space. */
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for (nmapped = 0; nmapped < npages; )
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{
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/* Get the shm[] index associated with the virtual address */
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shmndx = (vaddr - CONFIG_ARCH_SHM_VBASE) >> SECTION_SHIFT;
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/* Has a level 1 page table entry been created for this virtual address */
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l1entry = group->tg_addrenv.shm[shmndx];
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if (l1entry == NULL)
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{
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/* No.. Allocate one physical page for the L2 page table */
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paddr = mm_pgalloc(1);
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if (!paddr)
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{
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return -ENOMEM;
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}
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DEBUGASSERT(MM_ISALIGNED(paddr));
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/* We need to be more careful after we begin modifying
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* global resources.
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*/
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flags = irqsave();
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group->tg_addrenv.shm[shmndx] = (FAR uintptr_t *)paddr;
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#ifdef CONFIG_ARCH_PGPOOL_MAPPING
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/* Get the virtual address corresponding to the physical page
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* address.
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*/
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l2table = (FAR uint32_t *)arm_pgvaddr(paddr);
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#else
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/* Temporarily map the page into the virtual address space */
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l1save = mmu_l1_getentry(ARCH_SCRATCH_VBASE);
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mmu_l1_setentry(paddr & ~SECTION_MASK, ARCH_SCRATCH_VBASE,
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MMU_MEMFLAGS);
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l2table = (FAR uint32_t *)
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(ARCH_SCRATCH_VBASE | (paddr & SECTION_MASK));
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#endif
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/* Initialize the page table */
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memset(l2table, 0, ENTRIES_PER_L2TABLE * sizeof(uint32_t));
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}
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else
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{
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/* Get the physical address of the L2 page table from the L1 page
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* table entry.
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*/
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paddr = (uintptr_t)l1entry & ~SECTION_MASK;
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flags = irqsave();
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#ifdef CONFIG_ARCH_PGPOOL_MAPPING
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/* Get the virtual address corresponding to the physical page\
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* address.
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*/
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l2table = (FAR uint32_t *)arm_pgvaddr(paddr);
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#else
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/* Temporarily map the page into the virtual address space */
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l1save = mmu_l1_getentry(ARCH_SCRATCH_VBASE);
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mmu_l1_setentry(paddr & ~SECTION_MASK, ARCH_SCRATCH_VBASE,
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MMU_MEMFLAGS);
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l2table = (FAR uint32_t *)
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(ARCH_SCRATCH_VBASE | (paddr & SECTION_MASK));
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#endif
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}
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/* Map the virtual address to this physical address */
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DEBUGASSERT(get_l2_entry(l2table, vaddr) == 0);
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paddr = *pages++;
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set_l2_entry(l2table, paddr, vaddr, MMU_MEMFLAGS);
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nmapped++;
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vaddr += MM_PGSIZE;
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/* Make sure that the initialized L2 table is flushed to physical
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* memory.
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*
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* REVISIT: We could be smarter in doing this. Currently, we may
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* flush the entire L2 page table numerous times.
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*/
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arch_flush_dcache((uintptr_t)l2table,
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(uintptr_t)l2table +
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ENTRIES_PER_L2TABLE * sizeof(uint32_t));
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#ifndef CONFIG_ARCH_PGPOOL_MAPPING
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/* Restore the scratch section L1 page table entry */
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mmu_l1_restore(ARCH_SCRATCH_VBASE, l1save);
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#endif
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irqrestore(flags);
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}
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return OK;
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}
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/****************************************************************************
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@ -106,8 +240,103 @@ int up_shmat(FAR uintptr_t *pages, unsigned int npages, uintptr_t vaddr)
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int up_shmdt(uintptr_t vaddr, unsigned int npages)
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{
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#warning Missing logic
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return -ENOSYS;
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FAR struct tcb_s *tcb = sched_self();
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FAR struct task_group_s *group;
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FAR uintptr_t *l1entry;
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FAR uint32_t *l2table;
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irqstate_t flags;
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uintptr_t paddr;
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#ifndef CONFIG_ARCH_PGPOOL_MAPPING
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uint32_t l1save;
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#endif
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unsigned int nunmapped;
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unsigned int shmndx;
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shmvdbg("npages=%d vaddr=%08lx\n", npages, (unsigned long)vaddr);
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/* Sanity checks */
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DEBUGASSERT(npages > 0 && tcb && tcb->group);
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DEBUGASSERT(vaddr >= CONFIG_ARCH_SHM_VBASE && vaddr < ARCH_SHM_VEND);
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DEBUGASSERT(MM_ISALIGNED(vaddr));
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group = tcb->group;
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/* Loop until all pages have been unmapped from the caller's address
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* space.
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*/
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for (nunmapped = 0; nunmapped < npages; )
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{
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/* Get the shm[] index associated with the virtual address */
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shmndx = (vaddr - CONFIG_ARCH_SHM_VBASE) >> SECTION_SHIFT;
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/* Get the level 1 page table entry for this virtual address */
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l1entry = group->tg_addrenv.shm[shmndx];
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DEBUGASSERT(l1entry != NULL);
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/* Get the physical address of the L2 page table from the L1 page
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* table entry.
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*/
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paddr = (uintptr_t)l1entry & ~SECTION_MASK;
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flags = irqsave();
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#ifdef CONFIG_ARCH_PGPOOL_MAPPING
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/* Get the virtual address corresponding to the physical page\
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* address.
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*/
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l2table = (FAR uint32_t *)arm_pgvaddr(paddr);
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#else
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/* Temporarily map the page into the virtual address space */
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l1save = mmu_l1_getentry(ARCH_SCRATCH_VBASE);
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mmu_l1_setentry(paddr & ~SECTION_MASK, ARCH_SCRATCH_VBASE,
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MMU_MEMFLAGS);
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l2table = (FAR uint32_t *)
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(ARCH_SCRATCH_VBASE | (paddr & SECTION_MASK));
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#endif
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/* Unmap this virtual page address.
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*
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* REVISIT: Note that the page allocated for the level 2 page table
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* is not freed nor is the level 1 page table entry ever cleared.
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* This means that the 4KiB page is still allocated to the process
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* even though it may not contain any mappings and that the it will
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* persist until the process terminates. That is not all bad because
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* it means that we will be able to re-instantiate the shared memory
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* mapping very quickly.
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*/
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DEBUGASSERT(get_l2_entry(l2table, vaddr) != 0);
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clr_l2_entry(l2table, vaddr);
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nunmapped++;
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vaddr += MM_PGSIZE;
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/* Make sure that the modified L2 table is flushed to physical
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* memory.
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*
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* REVISIT: We could be smarter in doing this. Currently, we may
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* flush the entire L2 page table numerous times.
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*/
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arch_flush_dcache((uintptr_t)l2table,
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(uintptr_t)l2table +
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ENTRIES_PER_L2TABLE * sizeof(uint32_t));
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#ifndef CONFIG_ARCH_PGPOOL_MAPPING
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/* Restore the scratch section L1 page table entry */
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mmu_l1_restore(ARCH_SCRATCH_VBASE, l1save);
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#endif
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irqrestore(flags);
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}
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return OK;
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}
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#endif /* CONFIG_BUILD_KERNEL && CONFIG_MM_SHM */
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@ -69,32 +69,6 @@
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* Public Functions
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****************************************************************************/
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/****************************************************************************
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* Name: set_l2_entry
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*
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* Description:
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* Set the L2 table entry as part of the initialization of the L2 Page
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* table.
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*
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****************************************************************************/
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void set_l2_entry(FAR uint32_t *l2table, uintptr_t paddr, uintptr_t vaddr,
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uint32_t mmuflags)
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{
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uint32_t index;
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/* The table divides a 1Mb address space up into 256 entries, each
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* corresponding to 4Kb of address space. The page table index is
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* related to the offset from the beginning of 1Mb region.
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*/
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index = (vaddr & 0x000ff000) >> 12;
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/* Save the table entry */
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l2table[index] = (paddr | mmuflags);
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}
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/****************************************************************************
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* Name: arm_addrenv_create_region
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*
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@ -129,7 +103,7 @@ int arm_addrenv_create_region(FAR uintptr_t **list, unsigned int listlen,
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/* Verify that we are configured with enough virtual address space to
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* support this memory region.
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*
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* npages pages correspondes to (npages << MM_PGSHIFT) bytes
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* npages pages corresponds to (npages << MM_PGSHIFT) bytes
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* listlen sections corresponds to (listlen << 20) bytes
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*/
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@ -193,7 +167,7 @@ int arm_addrenv_create_region(FAR uintptr_t **list, unsigned int listlen,
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return -ENOMEM;
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}
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/* Map the .text region virtual address to this physical address */
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/* Map the virtual address to this physical address */
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set_l2_entry(l2table, paddr, vaddr, mmuflags);
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nmapped += MM_PGSIZE;
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@ -144,6 +144,81 @@ static inline bool arm_uservaddr(uintptr_t vaddr)
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);
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}
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/****************************************************************************
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* Name: set_l2_entry
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*
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* Description:
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* Set the L2 table entry as part of the initialization of the L2 Page
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* table.
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*
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****************************************************************************/
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static inline void set_l2_entry(FAR uint32_t *l2table, uintptr_t paddr,
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uintptr_t vaddr, uint32_t mmuflags)
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{
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uint32_t index;
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/* The table divides a 1Mb address space up into 256 entries, each
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* corresponding to 4Kb of address space. The page table index is
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* related to the offset from the beginning of 1Mb region.
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*/
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index = (vaddr & 0x000ff000) >> 12;
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/* Save the level 2 page table entry */
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l2table[index] = (paddr | mmuflags);
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}
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/****************************************************************************
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* Name: clr_l2_entry
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*
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* Description:
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* Claear the L2 table entry.
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*
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****************************************************************************/
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static inline void clr_l2_entry(FAR uint32_t *l2table, uintptr_t vaddr)
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{
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uint32_t index;
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/* The table divides a 1Mb address space up into 256 entries, each
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* corresponding to 4Kb of address space. The page table index is
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* related to the offset from the beginning of 1Mb region.
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*/
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index = (vaddr & 0x000ff000) >> 12;
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/* Save the level 2 page table entry */
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l2table[index] = 0;
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}
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/****************************************************************************
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* Name: get_l2_entry
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*
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* Description:
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* Set the L2 table entry as part of the initialization of the L2 Page
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* table.
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*
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****************************************************************************/
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static inline uintptr_t get_l2_entry(FAR uint32_t *l2table, uintptr_t vaddr)
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{
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uint32_t index;
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/* The table divides a 1Mb address space up into 256 entries, each
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* corresponding to 4Kb of address space. The page table index is
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* related to the offset from the beginning of 1Mb region.
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*/
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index = (vaddr & 0x000ff000) >> 12;
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/* Return the level 2 page table entry */
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return l2table[index];
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}
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/****************************************************************************
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* Public Functions
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****************************************************************************/
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