diff --git a/include/nuttx/pci/pci_regs.h b/include/nuttx/pci/pci_regs.h
index 2c362cf78d..ca0ae42ac6 100644
--- a/include/nuttx/pci/pci_regs.h
+++ b/include/nuttx/pci/pci_regs.h
@@ -267,13 +267,13 @@
 #define  PCI_PM_CTRL_STATE_MASK           0x0003  /* Current power state (D0 to D3) */
 #define  PCI_PM_CTRL_NO_SOFT_RESET        0x0008  /* No reset for D3hot->D0 */
 #define  PCI_PM_CTRL_PME_ENABLE           0x0100  /* PME pin enable */
-#define  PCI_PM_CTRL_DATA_SEL_MASK        0x1e00  /* Data select (??) */
-#define  PCI_PM_CTRL_DATA_SCALE_MASK      0x6000  /* Data scale (??) */
+#define  PCI_PM_CTRL_DATA_SEL_MASK        0x1e00  /* Data select (/?/?) */
+#define  PCI_PM_CTRL_DATA_SCALE_MASK      0x6000  /* Data scale (/?/?) */
 #define  PCI_PM_CTRL_PME_STATUS           0x8000  /* PME pin status */
-#define PCI_PM_PPB_EXTENSIONS             6       /* PPB support extensions (??) */
-#define  PCI_PM_PPB_B2_B3                 0x40    /* Stop clock when in D3hot (??) */
-#define  PCI_PM_BPCC_ENABLE               0x80    /* Bus power/clock control enable (??) */
-#define PCI_PM_DATA_REGISTER              7       /* (??) */
+#define PCI_PM_PPB_EXTENSIONS             6       /* PPB support extensions (/?/?) */
+#define  PCI_PM_PPB_B2_B3                 0x40    /* Stop clock when in D3hot (/?/?) */
+#define  PCI_PM_BPCC_ENABLE               0x80    /* Bus power/clock control enable (/?/?) */
+#define PCI_PM_DATA_REGISTER              7       /* (/?/?) */
 #define PCI_PM_SIZEOF                     8
 
 /* AGP registers */