From 4052ec2d9000c1db4efe9ca87eca40b25492b1af Mon Sep 17 00:00:00 2001 From: Gregory Nutt Date: Wed, 14 Dec 2016 12:14:51 -0600 Subject: [PATCH] Add missing ENTRY() and RET() macros in C callable assembly language. At one time I though the that the ESP32 support the CALL0 ABI. I was mistaken so there may be a few more like this. --- arch/xtensa/src/common/xtensa_cpuint.S | 8 ++++++-- 1 file changed, 6 insertions(+), 2 deletions(-) diff --git a/arch/xtensa/src/common/xtensa_cpuint.S b/arch/xtensa/src/common/xtensa_cpuint.S index 6ea46d71d4..9c7e28260b 100644 --- a/arch/xtensa/src/common/xtensa_cpuint.S +++ b/arch/xtensa/src/common/xtensa_cpuint.S @@ -40,6 +40,8 @@ #include #include +#include "xtensa_abi.h" + #if XCHAL_HAVE_INTERRUPTS /**************************************************************************** @@ -69,6 +71,7 @@ .align 4 xtensa_enable_cpuint: + ENTRY(16) movi a4, 0 xsr a4, INTENABLE /* Disables all interrupts */ @@ -80,7 +83,7 @@ xtensa_enable_cpuint: wsr a5, INTENABLE /* Set CPU INTENABLE to shadow */ mov a3, a4 /* Return previous shadow content */ - ret + RET(16) .size xtensa_enable_cpuint, . - xtensa_enable_cpuint @@ -107,6 +110,7 @@ xtensa_enable_cpuint: .align 4 xtensa_disable_cpuint: + ENTRY(16) movi a4, 0 xsr a4, INTENABLE /* Disables all interrupts */ @@ -119,7 +123,7 @@ xtensa_disable_cpuint: wsr a5, INTENABLE /* Set CPU INTENABLE to shadow */ mov a3, a4 /* Return previous shadow content */ - ret + RET(16) .size xtensa_disable_cpuint, . - xtensa_disable_cpuint