arch: imxrt: Fix style violations in imxrt_clockconfig.c
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8dda796e6a
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3f88f57666
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@ -212,8 +212,10 @@ static void imxrt_lcd_clockconfig(void)
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/* Select PLL5 as LCD Clock and set Pre divider. */
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modifyreg32(IMXRT_CCM_CSCDR2,
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CCM_CSCDR2_LCDIF_PRE_CLK_SEL_MASK | CCM_CSCDR2_LCDIF_PRED_MASK,
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CCM_CSCDR2_LCDIF_PRE_CLK_SEL_PLL5 | CCM_CSCDR2_LCDIF_PRED(pre_divider));
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CCM_CSCDR2_LCDIF_PRE_CLK_SEL_MASK |
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CCM_CSCDR2_LCDIF_PRED_MASK,
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CCM_CSCDR2_LCDIF_PRE_CLK_SEL_PLL5 |
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CCM_CSCDR2_LCDIF_PRED(pre_divider));
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/* Set Post divider. */
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@ -399,10 +401,10 @@ void imxrt_clockconfig(void)
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* clocking and SDRAM. We are pretty much committed to using things the
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* way that the bootloader has left them.
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*
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* Note that although this is safe at boot while nothing is using the clocks
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* additional caution is required if at some later date we want to
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* manipulate the PODFs while the system is running (for power minimisation)
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* because changing those is not glitch free.
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* Note that although this is safe at boot while nothing is using
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* the clocks additional caution is required if at some later date
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* we want to manipulate the PODFs while the system is running
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* (for power minimisation) because changing those is not glitch free.
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*/
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#ifndef CONFIG_IMXRT_BOOT_SDRAM
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@ -564,8 +566,9 @@ void imxrt_clockconfig(void)
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/* Set FlEXIO1 source & divider */
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reg = getreg32(IMXRT_CCM_CDCDR);
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reg &= ~(CCM_CDCDR_FLEXIO1_CLK_SEL_MASK | CCM_CDCDR_FLEXIO1_CLK_PODF_MASK | \
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CCM_CDCDR_FLEXIO1_CLK_PRED_MASK);
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reg &= ~(CCM_CDCDR_FLEXIO1_CLK_SEL_MASK |
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CCM_CDCDR_FLEXIO1_CLK_PODF_MASK |
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CCM_CDCDR_FLEXIO1_CLK_PRED_MASK);
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reg |= CCM_CDCDR_FLEXIO1_CLK_SEL(CONFIG_FLEXIO1_CLK);
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reg |= CCM_CDCDR_FLEXIO1_CLK_PODF
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(CCM_PODF_FROM_DIVISOR(CONFIG_FLEXIO1_PODF_DIVIDER));
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@ -609,7 +612,9 @@ void imxrt_clockconfig(void)
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reg = getreg32(IMXRT_CCM_CSCDR2);
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reg &= ~CCM_CSCDR2_LPI2C_CLK_PODF_MASK;
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reg |= CCM_CSCDR2_LPI2C_CLK_PODF(CCM_PODF_FROM_DIVISOR(IMXRT_LSI2C_PODF_DIVIDER));
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reg |= CCM_CSCDR2_LPI2C_CLK_PODF(
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CCM_PODF_FROM_DIVISOR(IMXRT_LSI2C_PODF_DIVIDER)
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);
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putreg32(reg, IMXRT_CCM_CSCDR2);
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#endif
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@ -626,7 +631,9 @@ void imxrt_clockconfig(void)
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reg = getreg32(IMXRT_CCM_CBCMR);
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reg &= ~CCM_CBCMR_LPSPI_PODF_MASK;
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reg |= CCM_CBCMR_LPSPI_PODF(CCM_PODF_FROM_DIVISOR(IMXRT_LSPI_PODF_DIVIDER));
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reg |= CCM_CBCMR_LPSPI_PODF(
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CCM_PODF_FROM_DIVISOR(IMXRT_LSPI_PODF_DIVIDER)
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);
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putreg32(reg, IMXRT_CCM_CBCMR);
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#endif
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@ -646,7 +653,9 @@ void imxrt_clockconfig(void)
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#endif
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#ifdef CONFIG_IMXRT_USDHC
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/* Optionally set USDHC1 & 2 to generate clocks from IMXRT_USDHC1_CLK_SELECT */
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/* Optionally set USDHC1 & 2 to generate clocks
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* from IMXRT_USDHC1_CLK_SELECT
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*/
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reg = getreg32(IMXRT_CCM_CSCMR1);
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reg &= ~(CCM_CSCMR1_USDHC1_CLK_SEL | CCM_CSCMR1_USDHC2_CLK_SEL);
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