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incubator-nuttx
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Squashed commit of the following: 

drivers/lcd/ft80x:  ACTIVE host command appears to be formatted differently than other host commands; Fix ROM CHIPID.  Appears to be big-ending, BCD.
    drivers/lcd/ft80x:  Fix some compile issues when debug features are enabled.
This commit is contained in:
Gregory Nutt 2018-03-09 12:32:59 -06:00
parent ed50b14cee
commit 399b9860af
4 changed files with 29 additions and 19 deletions
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2
configs/viewtool-stm32f107/src/stm32_ft80x.c
View File

@ -234,7 +234,7 @@ static void ft80x_clear(FAR const struct ft80x_config_s *lower)
static void ft80x_pwrdown(FAR const struct ft80x_config_s *lower,
bool pwrdown)
{
/* Powerdown pin is active low */
/* Powerdown pin is active low. Hence, it is really a power up pin. */
stm32_gpiowrite(GPIO_FT80_PD, !pwrdown);
}

26
drivers/lcd/ft80x.c
View File

@ -79,21 +79,27 @@
* Pre-processor Definitions
****************************************************************************/
#define CHIPID 0x7c
#define ROMID_MASK 0x0000ffff
#define CHIPID 0x7c
#define ROMID_MASK 0x0000ffff
#define VERSION_MASK 0xffff0000
#if defined(CONFIG_LCD_FT800)
# define DEVNAME "/dev/ft800"
# define ROMID 0x00000800
# define DEVNAME "/dev/ft800"
# define ROM_CHIPID 0x00010008 /* Byte [0:1] Chip ID "0800" BCD
* Byte [2:3] Version "0100" BCD */
#elif defined(CONFIG_LCD_FT801)
# define DEVNAME "/dev/ft801"
# define ROMID 0x00000801
# define DEVNAME "/dev/ft801"
# define ROM_CHIPID 0x00010108 /* Byte [0:1] Chip ID "0801" BCD
* Byte [2:3] Version "0100" BCD */
#else
# error No FT80x device configured
#endif
#define MIN_FADE_DELAY 10 /* Milliseconds */
#define MAX_FADE_DELAY 16700 /* Milliseconds */
#define FADE_STEP_MSEC 10 /* Milliseconds */
#define ROMID (ROM_CHIPID & ROMID_MASK)
#define VERSION (ROM_CHIPID & VERSION_MASK)
#define MIN_FADE_DELAY 10 /* Milliseconds */
#define MAX_FADE_DELAY 16700 /* Milliseconds */
#define FADE_STEP_MSEC 10 /* Milliseconds */
/****************************************************************************
* Private Function Prototypes
@ -269,7 +275,7 @@ static void ft80x_notify(FAR struct ft80x_dev_s *priv,
if (info->enable)
{
DEBUGASSERT(info->signo > 0 && GOOD_SIGNAL(info->signo) && info->pid > 0);
DEBUGASSERT(info->signo > 0 && GOOD_SIGNO(info->signo) && info->pid > 0);
/* Yes.. Signal the client */

12
drivers/lcd/ft80x_spi.c
View File

@ -113,21 +113,23 @@ static void ft80x_deselect(FAR struct ft80x_dev_s *priv)
* Description:
* Send a host command to the FT80x
*
* FFor a SPI write command write transaction, the host writes a zero bit
* For an SPI write command write transaction, the host writes a zero bit
* followed by a one bit, followed by the 5-bit command, followed by two
* bytes of zero. All data is streamed with a single chip select.
*
* NOTE: Commands are defined in ft80x.h with bit 7 = 0 and bit 6 = 1.
*
****************************************************************************/
void ft80x_host_command(FAR struct ft80x_dev_s *priv, uint8_t cmd)
{
struct ft80x_hostwrite_s hostwrite;
DEBUGASSERT(priv != NULL && (cnd & 0xc0) == 0);
DEBUGASSERT(priv != NULL && (cmd == 0x00 || (cmd & 0xc0) == 0x40));
/* Format the host write command */
hostwrite.cmd = 0x40 | cmd;
hostwrite.cmd = cmd;
hostwrite.pad1 = 0;
hostwrite.pad2 = 0;
@ -162,7 +164,7 @@ void ft80x_read_memory(FAR struct ft80x_dev_s *priv, uint32_t addr,
struct ft80x_spiread_s spiread;
DEBUGASSERT(priv != NULL && (addr & 0xffc00000) == 0 &&
buffer != NULL && bulen > 0);
buffer != NULL && buflen > 0);
/* Format the read header */
@ -238,7 +240,7 @@ void ft80x_write_memory(FAR struct ft80x_dev_s *priv, uint32_t addr,
struct ft80x_spiwrite_s spiwrite;
DEBUGASSERT(priv != NULL && (addr & 0xffc00000) == 0 &&
buffer != NULL && bulen > 0);
buffer != NULL && buflen > 0);
/* Format the write header */

8
include/nuttx/lcd/ft80x.h
View File

@ -634,15 +634,17 @@
#define FT80X_INT(n) (1 << (n))
/* FT80x Display List Commands **************************************************************/
/* Host commands. 3 word commands. The first word begins with 0b01, the next two are zero */
/* Host commands. 3 byte commands. The first byte begins with [7:6]==01. Bits [5:0] of
* the first byte are actual command. The following two bytes must be zero.
*/
#define FT80X_CMD_ACTIVE 0x00 /* Switch from Standby/Sleep modes to active mode */
#define FT80X_CMD_STANDBY 0x41 /* Put FT80x core to standby mode */
#define FT80X_CMD_SLEEP 0x42 /* Put FT80x core to sleep mode */
#define FT80X_CMD_PWRDOWN 0x50 /* Switch off 1.2V internal regulator */
#define FT80X_CMD_CLKEXT 0x44 /* Enable PLL input from oscillator or external clock */
#define FT80X_CMD_CLK48M 0x62 /* Switch PLL output clock to 48MHz (default). */
#define FT80X_CMD_PWRDOWN 0x50 /* Switch off 1.2V internal regulator */
#define FT80X_CMD_CLK36M 0x61 /* Switch PLL output clock to 36MHz */
#define FT80X_CMD_CLK48M 0x62 /* Switch PLL output clock to 48MHz (default). */
#define FT80X_CMD_CORERST 0x68 /* Send reset pulse to FT800 core */
/* Display list command encoding