style/code: remove unnecessary trailing whitespace
N/A Signed-off-by: chao.an <anchao@xiaomi.com>
This commit is contained in:
chao.an
Abdelatif Guettouche
parent
e5f5f6657d
commit
32ba194372
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@ -269,7 +269,7 @@
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#define ADC_CFGR_DISCEN (1 << 16) /* Bit 16: Discontinuous mode on regular channels */
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#define ADC_CFGR_DISCNUM_SHIFT (17) /* Bits 17-19: Discontinuous mode channel count */
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#define ADC_CFGR_DISCNUM_MASK (7 << ADC_CFGR_DISCNUM_SHIFT)
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# define ADC_CFGR_DISCNUM(n) (((n) - 1) << ADC_CFGR_DISCNUM_SHIFT)
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# define ADC_CFGR_DISCNUM(n) (((n) - 1) << ADC_CFGR_DISCNUM_SHIFT)
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/* n = 1..8 channels */
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#define ADC_CFGR_JDISCEN (1 << 20) /* Bit 20: Discontinuous mode on injected channels */
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@ -457,7 +457,7 @@
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/* n=1..4 */
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#define ADC_JSQR_JEXTSEL_SHIFT (2) /* Bits 2-5: External Trigger Selection for injected group */
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#define ADC_JSQR_JEXTSEL_MASK (15 << ADC_JSQR_JEXTSEL_SHIFT)
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# define ADC_JSQR_JEXTSEL(event) ((event) << ADC_JSQR_JEXTSEL_SHIFT)
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# define ADC_JSQR_JEXTSEL(event) ((event) << ADC_JSQR_JEXTSEL_SHIFT)
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/* Event = 0..15 */
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# define ADC_JEXTSEL_T1TRGO ADC_JSQR_JEXTSEL(0) /* 0000 TIM1_TRGO */
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# define ADC_JEXTSEL_T1CC4 ADC_JSQR_JEXTSEL(1) /* 0001 TIM1_CH4 */
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@ -577,7 +577,7 @@
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# define ADC_CCR_DUAL_ALT (9 << ADC_CCR_DUAL_SHIFT) /* Alternate trigger mode only */
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# define ADC_CCR_DELAY_SHIFT (8) /* Bits 8-11: Delay between 2 sampling phases */
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# define ADC_CCR_DELAY_MASK (15 << ADC_CCR_DELAY_SHIFT)
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# define ADC_CCR_DELAY(n) (((n)-1) << ADC_CCR_DELAY_SHIFT)
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# define ADC_CCR_DELAY(n) (((n)-1) << ADC_CCR_DELAY_SHIFT)
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/* n * TADCCLK, 1-13 */
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# define ADC_CCR_DMACFG (1 << 13) /* Bit 13: DMA configuration (for dual ADC mode) */
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# define ADC_CCR_MDMA_SHIFT (14) /* Bits 14-15: Direct memory access mode for dual ADC mode */
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@ -84,13 +84,13 @@
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* End(+1): _ebss + CONFIG_IDLETHREAD_STACKSIZE
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* 6) Optional interrupt stack
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* Start: _ebss + CONFIG_IDLETHREAD_STACKSIZE
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* End(+1): _ebss + CONFIG_IDLETHREAD_STACKSIZE +
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* End(+1): _ebss + CONFIG_IDLETHREAD_STACKSIZE +
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(CONFIG_ARCH_INTERRUPTSTACK & ~3)
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* 6a) Heap (without interrupt stack)
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* Start: _ebss + CONFIG_IDLETHREAD_STACKSIZE
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* End(+1): to the end of memory
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* 6b) Heap (with interrupt stack)
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* Start: _ebss + CONFIG_IDLETHREAD_STACKSIZE +
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* Start: _ebss + CONFIG_IDLETHREAD_STACKSIZE +
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(CONFIG_ARCH_INTERRUPTSTACK & ~3)
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* End(+1): to the end of memory
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*/
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@ -472,7 +472,7 @@ __start:
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ehb
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la t0, pic32mz_consoleinit
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jalr ra, t0
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jalr ra, t0
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nop
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showprogress 'A'
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@ -172,7 +172,7 @@ start32:
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// Popluate the lower 4GB as non-present
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// for ecx = 0...512 * 4 : Loop and setup the page directories
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mov $0x800, %ecx // 512 * 4
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epd_loop:
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epd_loop:
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mov %esi, %edx
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or $(X86_PAGE_WR | X86_PAGE_PRESENT), %edx
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mov %edx, 0(%edi)
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@ -198,7 +198,7 @@ ept_loop:
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// for ecx = 0...64 : Loop and setup 64x 2MB page directories
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mov $64, %ecx
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pd_loop:
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pd_loop:
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mov %eax, 0(%edi)
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add $(HUGE_PAGE_SIZE), %eax
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add $(X86_PAGE_ENTRY_SIZE), %edi
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@ -221,7 +221,7 @@ pd_loop:
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mov %eax, %cr4
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// Load the 4 level page table
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// Level 1 and 2 were preset at build time in assembly for this loading
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// Level 1 and 2 were preset at build time in assembly for this loading
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// process
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// 4KiB page table is used
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// Kernel mapped to 1GB HiMem
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@ -323,7 +323,7 @@ __revoke_low_memory:
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// for ecx = 0...64 : Loop and setup 64x 2MB page directories
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mov $64, %ecx
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npd_loop:
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npd_loop:
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mov %esi, %edx
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or $(X86_PAGE_WR | X86_PAGE_PRESENT), %edx
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mov %edx, 0(%edi)
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@ -354,12 +354,12 @@ __enable_sse_avx:
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mov $(X86_CR0_EM), %rbx
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not %rbx
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and %rbx, %rax
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or $(X86_CR0_MP), %rax
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or $(X86_CR0_MP), %rax
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mov %rax, %cr0
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// Enable Saving XMM context
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mov %cr4, %rax
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or $(X86_CR4_OSXFSR | X86_CR4_XMMEXCPT), %rax
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or $(X86_CR4_OSXFSR | X86_CR4_XMMEXCPT), %rax
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mov %rax, %cr4
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// Setup MXCSR, masking all SSE precision exception
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@ -74,8 +74,8 @@
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* modified upon return from a subroutine call. On a context switch
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* back to user mode, it will appear as a return from this function.
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*
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* According to the SysV x86_64 ABI, the RAX, RDI, RSI, RDX, RCX, r8 and r9
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* are to be free for use within a procedure or function, and need not
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* According to the SysV x86_64 ABI, the RAX, RDI, RSI, RDX, RCX, r8 and r9
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* are to be free for use within a procedure or function, and need not
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* be preserved.
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*
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* On entry,
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@ -87,7 +87,7 @@
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.globl up_saveusercontext
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.type up_saveusercontext, @function
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up_saveusercontext:
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// callee saved regs
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movq %rbx, (8*REG_RBX)(%rdi)
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movq %r12, (8*REG_R12)(%rdi)
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@ -268,7 +268,7 @@ isr_common:
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/* save xmm registers */
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leaq -512(%rsp), %rsp
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fxsaveq (%rsp)
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/* The current value of the SP points to the beginning of the state save
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* structure. Save that in RDI as the input parameter to isr_handler.
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@ -89,7 +89,7 @@ xtensa_backtrace_start:
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/* a2, a3, a4 should be out arguments for i SP, i PC, i-1 PC respectively.
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* Use a5 and a6 as scratch.
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*/
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l32e a5, sp, -16 /* Get i PC, which is ret addres of i+1 */
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s32i a5, a2, 0 /* Store i PC to arg *pc */
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l32e a6, sp, -12 /* Get i+1 SP. Used to access i BS */
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@ -26,7 +26,7 @@
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#include <nuttx/irq.h>
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#include <stdbool.h>
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#include "xtensa.h"
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#include "hardware/esp32_tim.h"
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#include "hardware/esp32_tim.h"
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#include "hardware/esp32_rtccntl.h"
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#include "esp32_wtd.h"
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#include "esp32_cpuint.h"
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@ -49,15 +49,15 @@
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*/
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#define MS_CYCLES_TIMER 2 /* 1 ms/(12.5 ns*PRE_VALUE) */
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#define STAGE_0 0
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#define STAGE_0 0
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#define STAGE_1 1
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#define STAGE_2 2
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#define STAGE_3 3
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#define STAGE_3 3
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#define RESET_SYSTEM_RTC 4 /* Reset Main System + RTC */
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#define RESET_SYSTEM_TIMER 3 /* Reset Main System */
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#define RESET_SYSTEM_TIMER 3 /* Reset Main System */
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#define INTERRUPT_ON_TIMEOUT 1
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#define STAGES 4
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#define FULL_STAGE 0xffffffff /* ((2^32)-1) */
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#define FULL_STAGE 0xffffffff /* ((2^32)-1) */
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#define MAX_MWDT_TIMEOUT_MS 0x7fffffff /* ((2^32)-1)/cycles */
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/****************************************************************************
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@ -90,6 +90,6 @@
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/* Define how many LEDs this board has (needed by userleds) */
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#define BOARD_NLEDS 1
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#define GPIO_LED1 2
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#define GPIO_LED1 2
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#endif /* __BOARDS_XTENSA_ESP32_ESP32_CORE_INCLUDE_BOARD_H */
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@ -175,7 +175,7 @@ int esp32_bringup(void)
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#ifdef CONFIG_ESP32_SPIFLASH_ENCRYPTION_TEST
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esp32_spiflash_encrypt_test();
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#endif
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#endif
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ret = esp32_spiflash_init();
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if (ret)
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