From 2ab8852b29f06f9f3e8238212c23ac206b1faac3 Mon Sep 17 00:00:00 2001 From: Gregory Nutt Date: Sun, 13 Aug 2017 06:50:48 -0600 Subject: [PATCH] STM32F7: Some STM32F7 builds failed in build testing due to undefined STM32_SRAM1_BASE. I think that is because stm32_allocateheap.c was not including chip/stm32_memorymap.h --- arch/arm/src/stm32f7/stm32_allocateheap.c | 2 ++ arch/arm/src/stm32f7/stm32f76xx77xx_rcc.c | 2 +- 2 files changed, 3 insertions(+), 1 deletion(-) diff --git a/arch/arm/src/stm32f7/stm32_allocateheap.c b/arch/arm/src/stm32f7/stm32_allocateheap.c index b58a3df9a0..afc23bbe0d 100644 --- a/arch/arm/src/stm32f7/stm32_allocateheap.c +++ b/arch/arm/src/stm32f7/stm32_allocateheap.c @@ -56,6 +56,8 @@ #include "mpu.h" #include "up_arch.h" #include "up_internal.h" + +#include "chip/stm32_memorymap.h" #include "stm32_mpuinit.h" #include "stm32_dtcm.h" diff --git a/arch/arm/src/stm32f7/stm32f76xx77xx_rcc.c b/arch/arm/src/stm32f7/stm32f76xx77xx_rcc.c index 0d784ff123..3493a3e124 100644 --- a/arch/arm/src/stm32f7/stm32f76xx77xx_rcc.c +++ b/arch/arm/src/stm32f7/stm32f76xx77xx_rcc.c @@ -61,7 +61,7 @@ #define HSE_DIVISOR (STM32_HSE_FREQUENCY + 500000) / 1000000 /* If CONFIG_STM32F7_DSIHOST is defined in the board configuration, then - * STM32_RCC_DCKCFGR2_DSISRC must also be defined to selected the clock + * STM32_RCC_DCKCFGR2_DSISRC must also be defined to selecte the clock * source. */