From 20d24fe14894108221c9f6a926a487dd9be80909 Mon Sep 17 00:00:00 2001 From: Gustavo Henrique Nihei Date: Sat, 20 Mar 2021 22:31:09 -0300 Subject: [PATCH] xtensa/esp32: Fix esp32_spi_setbits for Polling when DMA is also enabled Commit 6382b2ba introduced the possibility of using SPI in Mixed mode, i.e. performing SPI transfers via both polling and interrupts. However, setbits was only applying the configuration if DMA was not enabled. --- arch/xtensa/src/esp32/esp32_spi.c | 26 +++++--------------------- 1 file changed, 5 insertions(+), 21 deletions(-) diff --git a/arch/xtensa/src/esp32/esp32_spi.c b/arch/xtensa/src/esp32/esp32_spi.c index 76e4c09fdf..26f7eca40e 100644 --- a/arch/xtensa/src/esp32/esp32_spi.c +++ b/arch/xtensa/src/esp32/esp32_spi.c @@ -784,28 +784,12 @@ static void esp32_spi_setbits(FAR struct spi_dev_s *dev, int nbits) spiinfo("nbits=%d\n", nbits); - /* Has the number of bits changed? */ + priv->nbits = nbits; - if (nbits != priv->nbits) - { - /* Save the selection so that subsequent re-configurations - * will be faster. - */ - - priv->nbits = nbits; - - /* Each DMA transmission will set these value according to - * calculated buffer length. - */ - - if (!priv->config->use_dma) - { - esp32_spi_set_reg(priv, SPI_MISO_DLEN_OFFSET, - (priv->nbits - 1) << SPI_USR_MISO_DBITLEN_S); - esp32_spi_set_reg(priv, SPI_MOSI_DLEN_OFFSET, - (priv->nbits - 1) << SPI_USR_MOSI_DBITLEN_S); - } - } + esp32_spi_set_reg(priv, SPI_MISO_DLEN_OFFSET, + (priv->nbits - 1) << SPI_USR_MISO_DBITLEN_S); + esp32_spi_set_reg(priv, SPI_MOSI_DLEN_OFFSET, + (priv->nbits - 1) << SPI_USR_MOSI_DBITLEN_S); } /****************************************************************************