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Update Olimex-LPC1766STK scripts to use OpenOCD-0.7.0

This commit is contained in:
Gregory Nutt 2013-05-10 10:37:45 -06:00
parent 88c0911fb1
commit 2072052db9
3 changed files with 35 additions and 9 deletions
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5
ChangeLog
View File

@ -4696,4 +4696,7 @@
* arch/arm/src/lpc17xx/lpc17_i2c.c: Fix for lpc17xx i2c single byte read
timeout error problem from M.Kannan (2013-5-8).
* arch/arm/src/stm32/stm32_adc.c: Typo in F2/F4 specific logic: ACD_
instead of ADC_. From Ken Pettit (2013-5-8).
instead of ADC_. From Ken Pettit (2014-5-8).
* configs/olimex-lpc1766stk/tools: Tweaks to support OpenOCD-0.70
(2013-5-10).

31
configs/olimex-lpc1766stk/tools/olimex.cfg
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@ -38,6 +38,18 @@ if { [info exists CPUTAPID ] } {
set _CPUTAPID 0x4ba00477
}
if { [info exists CPURAMSIZE] } {
set _CPURAMSIZE $CPURAMSIZE
} else {
set _CPURAMSIZE 0x8000
}
if { [info exists CPUROMSIZE] } {
set _CPUROMSIZE $CPUROMSIZE
} else {
set _CPUROMSIZE 0x40000
}
#delays on reset lines
adapter_nsrst_delay 200
jtag_ntrst_delay 200
@ -49,23 +61,29 @@ reset_config trst_and_srst srst_pulls_trst
jtag newtap $_CHIPNAME cpu -irlen 4 -expected-id $_CPUTAPID
set _TARGETNAME $_CHIPNAME.cpu
target create $_TARGETNAME cortex_m3 -chain-position $_TARGETNAME
# openocd-0.4:
# target create $_TARGETNAME cortex_m3 -chain-position $_TARGETNAME
# openocd-0.7:
target create $_TARGETNAME cortex_m -chain-position $_TARGETNAME
# LPC1766 has 32kB of SRAM In the ARMv7-M "Code" area (at 0x10000000)
# and 32K more on AHB, in the ARMv7-M "SRAM" area, (at 0x2007c000).
$_TARGETNAME configure -work-area-phys 0x10000000 -work-area-size 0x8000
$_TARGETNAME configure -work-area-phys 0x10000000 -work-area-size $_CPURAMSIZE
# LPC1766 has 256kB of flash memory, managed by ROM code (including a
# boot loader which verifies the flash exception table's checksum).
# flash bank <name> lpc2000 <base> <size> 0 0 <target#> <variant> <clock> [calc checksum]
set _FLASHNAME $_CHIPNAME.flash
flash bank $_FLASHNAME lpc2000 0x0 0x40000 0 0 $_TARGETNAME \
flash bank $_FLASHNAME lpc2000 0x0 $_CPUROMSIZE 0 0 $_TARGETNAME \
lpc1700 $_CCLK calc_checksum
# Run with *real slow* clock by default since the
# boot rom could have been playing with the PLL, so
# we have no idea what clock the target is running at.
jtag_khz 100
# openocd-0.4:
# jtag_khz 100
# openocd-0.7
adapter_khz 100
$_TARGETNAME configure -event reset-init {
# Do not remap 0x0000-0x0020 to anything but the flash (i.e. select
@ -84,3 +102,8 @@ $_TARGETNAME configure -event reset-init {
mww 0x400FC040 0x01
}
# if srst is not fitted use VECTRESET to
# perform a soft reset - SYSRESETREQ is not supported
# openocd-0.7:
cortex_m reset_config vectreset

8
configs/olimex-lpc1766stk/tools/oocd.sh
View File

@ -11,14 +11,14 @@ if [ -z "${TOPDIR}" ]; then
exit 1
fi
# Assume that OpenOCD was installed and at /usr/local/bin. Uncomment
# the following to run directly from the build directory
#OPENOCD_PATH="/home/OpenOCD/openocd/src"
#TARGET_PATH="/home/OpenOCD/openocd/tcl"
# Assume that OpenOCD was installed and at /usr/local/bin or maybe c:\OpenOCD
#OPENOCD_PATH="/cygdrive/c/OpenOCD/openocd-0.4.0/src"
#TARGET_PATH="c:\OpenOCD\openocd-0.4.0\tcl"
OPENOCD_PATH="/usr/local/bin"
TARGET_PATH="/usr/local/share/openocd/scripts"
OPENOCD_EXE=openocd.exe
#OPENOCD_CFG=`cygpath -w "${TOPDIR}/configs/olimex-lpc1766stk/tools/olimex.cfg"`
OPENOCD_CFG="${TOPDIR}/configs/olimex-lpc1766stk/tools/olimex.cfg"
OPENOCD_ARGS="-f ${OPENOCD_CFG} -s ${TARGET_PATH}"