stm32l4 dfumode: enable for STM32L4+ chips
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@ -46,6 +46,8 @@ static inline void rcc_reset(void)
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{
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uint32_t regval;
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/* Enable the MSI clock */
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regval = getreg32(STM32L4_RCC_CR);
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regval |= RCC_CR_MSION;
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putreg32(regval, STM32L4_RCC_CR);
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@ -63,11 +65,11 @@ static inline void rcc_reset(void)
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putreg32(0x00000000, STM32L4_RCC_CFGR);
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/* Reset HSION, HSEON, CSSON and PLLON bits */
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/* Reset enable bits for other clocks than MSI */
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regval = getreg32(STM32L4_RCC_CR);
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regval &= ~(RCC_CR_HSION | RCC_CR_HSIKERON | RCC_CR_HSEON |
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RCC_CR_HSIASFS | RCC_CR_CSSON | RCC_CR_PLLON | RCC_CR_PLLON |
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RCC_CR_HSIASFS | RCC_CR_CSSON | RCC_CR_PLLON |
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RCC_CR_PLLSAI1ON | RCC_CR_PLLSAI2ON);
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putreg32(regval, STM32L4_RCC_CR);
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@ -121,7 +123,7 @@ static inline void apb_reset(void)
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*
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****************************************************************************/
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#if defined(CONFIG_STM32L4_STM32L4X6)
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#if defined(CONFIG_STM32L4_STM32L4X6) || defined(CONFIG_STM32L4_STM32L4XR)
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void stm32l4_dfumode(void)
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{
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uint32_t regval;
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@ -131,7 +133,7 @@ void stm32l4_dfumode(void)
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_warn("Entering DFU mode...\n");
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#endif
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/* disable all peripherals, interrupts and switch to HSI */
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/* disable all peripherals, interrupts and switch to MSI */
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rcc_reset();
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apb_reset();
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@ -39,7 +39,7 @@
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*
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****************************************************************************/
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#if defined(CONFIG_STM32L4_STM32L4X6)
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#if defined(CONFIG_STM32L4_STM32L4X6) || defined(CONFIG_STM32L4_STM32L4XR)
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void stm32l4_dfumode(void) noreturn_function;
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#endif
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