board/arm/qemu: Adjust the address mapping in the LD script
Summary: 1. The start location of FLASH reserves the extended bootloader 2. DTB data is reserved at the start location of RAM Signed-off-by: wangming9 <wangming9@xiaomi.com> Signed-off-by: lipengfei28 <lipengfei28@xiaomi.com>
This commit is contained in:
parent
080c22e944
commit
1f0cc62a8d
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@ -40,9 +40,9 @@ CONFIG_DEV_ZERO=y
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CONFIG_ELF=y
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CONFIG_EXAMPLES_HELLO=m
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CONFIG_EXPERIMENTAL=y
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CONFIG_FLASH_SIZE=134217728
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CONFIG_FLASH_START=0
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CONFIG_FLASH_VSTART=0
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CONFIG_FLASH_SIZE=127926272
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CONFIG_FLASH_START=0x00600000
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CONFIG_FLASH_VSTART=0x00600000
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CONFIG_FS_HOSTFS=y
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CONFIG_FS_PROCFS=y
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CONFIG_HAVE_CXX=y
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@ -67,9 +67,9 @@ CONFIG_NSH_READLINE=y
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CONFIG_ONESHOT=y
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CONFIG_PATH_INITIAL="/system/bin"
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CONFIG_PREALLOC_TIMERS=4
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CONFIG_RAM_SIZE=536870912
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CONFIG_RAM_START=0x40000000
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CONFIG_RAM_VSTART=0x40000000
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CONFIG_RAM_SIZE=132120576
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CONFIG_RAM_START=0x40200000
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CONFIG_RAM_VSTART=0x40200000
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CONFIG_RAW_BINARY=y
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CONFIG_READLINE_CMD_HISTORY=y
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CONFIG_RR_INTERVAL=200
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@ -27,9 +27,9 @@ CONFIG_DEFAULT_TASK_STACKSIZE=4096
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CONFIG_DEV_ZERO=y
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CONFIG_EXAMPLES_HELLO=y
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CONFIG_EXPERIMENTAL=y
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CONFIG_FLASH_SIZE=134217728
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CONFIG_FLASH_START=0
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CONFIG_FLASH_VSTART=0
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CONFIG_FLASH_SIZE=127926272
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CONFIG_FLASH_START=0x00600000
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CONFIG_FLASH_VSTART=0x00600000
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CONFIG_FS_PROCFS=y
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CONFIG_FS_ROMFS=y
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CONFIG_HAVE_CXX=y
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@ -47,9 +47,9 @@ CONFIG_NSH_READLINE=y
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CONFIG_ONESHOT=y
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CONFIG_PREALLOC_TIMERS=4
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CONFIG_RAMLOG=y
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CONFIG_RAM_SIZE=134217728
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CONFIG_RAM_START=0x40000000
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CONFIG_RAM_VSTART=0x40000000
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CONFIG_RAM_SIZE=132120576
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CONFIG_RAM_START=0x40200000
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CONFIG_RAM_VSTART=0x40200000
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CONFIG_RAW_BINARY=y
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CONFIG_READLINE_CMD_HISTORY=y
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CONFIG_RR_INTERVAL=200
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@ -24,9 +24,9 @@ CONFIG_DEFAULT_TASK_STACKSIZE=4096
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CONFIG_DEV_ZERO=y
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CONFIG_EXAMPLES_HELLO=y
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CONFIG_EXPERIMENTAL=y
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CONFIG_FLASH_SIZE=134217728
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CONFIG_FLASH_START=0
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CONFIG_FLASH_VSTART=0
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CONFIG_FLASH_SIZE=127926272
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CONFIG_FLASH_START=0x00600000
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CONFIG_FLASH_VSTART=0x00600000
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CONFIG_FS_PROCFS=y
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CONFIG_FS_ROMFS=y
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CONFIG_HAVE_CXX=y
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@ -44,9 +44,9 @@ CONFIG_NSH_READLINE=y
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CONFIG_ONESHOT=y
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CONFIG_PREALLOC_TIMERS=4
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CONFIG_RAMLOG=y
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CONFIG_RAM_SIZE=134217728
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CONFIG_RAM_START=0x40000000
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CONFIG_RAM_VSTART=0x40000000
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CONFIG_RAM_SIZE=132120576
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CONFIG_RAM_START=0x40200000
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CONFIG_RAM_VSTART=0x40200000
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CONFIG_RAW_BINARY=y
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CONFIG_READLINE_CMD_HISTORY=y
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CONFIG_RR_INTERVAL=200
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@ -17,15 +17,20 @@
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* under the License.
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*
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****************************************************************************/
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#include <nuttx/config.h>
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OUTPUT_ARCH(arm)
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ENTRY(__start)
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PHDRS
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MEMORY
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{
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text PT_LOAD ;
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ROM (rx) : ORIGIN = CONFIG_FLASH_START, LENGTH = CONFIG_FLASH_SIZE
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RAM (rwx): ORIGIN = CONFIG_RAM_START, LENGTH = CONFIG_RAM_SIZE
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}
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SECTIONS
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{
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. = 0x40101000;
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/* where the global variable out-of-bounds detection information located */
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@ -43,73 +48,77 @@ SECTIONS
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#endif
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.text : {
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_stext = .; /* Text section */
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*(.vectors)
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*(.text)
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*(.text.cold)
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*(.text.unlikely)
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*(.fixup)
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*(.gnu.warning)
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} :text
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_stext = .; /* Text section */
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__text_start = .;
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*(.vectors)
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*(.text*)
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*(.fixup)
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*(.gnu.warning)
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} > ROM
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. = ALIGN(4096);
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.init_section : {
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_sinit = ABSOLUTE(.);
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KEEP(*(SORT_BY_INIT_PRIORITY(.init_array.*) SORT_BY_INIT_PRIORITY(.ctors.*)))
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KEEP(*(.init_array EXCLUDE_FILE(*crtbegin.o *crtbegin?.o *crtend.o *crtend?.o) .ctors))
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_einit = ABSOLUTE(.);
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} :text
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. = ALIGN(4096);
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_etext = .; /* End_1 of .text */
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_sztext = _etext - _stext;
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_sinit = ABSOLUTE(.);
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KEEP(*(SORT_BY_INIT_PRIORITY(.init_array.*) SORT_BY_INIT_PRIORITY(.ctors.*)))
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KEEP(*(.init_array EXCLUDE_FILE(*crtbegin.o *crtbegin?.o *crtend.o *crtend?.o) .ctors))
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_einit = ABSOLUTE(.);
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. = ALIGN(4096);
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_etext = .; /* End_1 of .text */
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_sztext = _etext - _stext;
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} > ROM
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.ARM.extab :
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{
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*(.ARM.extab*)
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} > ROM
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/* .ARM.exidx is sorted, so has to go in its own output section. */
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PROVIDE_HIDDEN (__exidx_start = .);
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.ARM.exidx :
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{
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*(.ARM.exidx* .gnu.linkonce.armexidx.*)
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} > ROM
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PROVIDE_HIDDEN (__exidx_end = .);
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.rodata : {
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_srodata = .; /* Read-only data */
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*(.rodata)
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*(.rodata.*)
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*(.data.rel.ro)
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*(.data.rel.ro.*)
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} :text
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. = ALIGN(4096);
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_erodata = .; /* End of read-only data */
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_szrodata = _erodata - _srodata;
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_eronly = .; /* End of read-only data */
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_srodata = .; /* Read-only data */
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*(.rodata*)
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*(.data.rel.ro*)
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KEEP(*(SORT(.scattered_array*)));
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. = ALIGN(4096);
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_erodata = .;
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} > ROM
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_eronly = LOADADDR(.data);
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.data : { /* Data */
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_sdata = .;
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*(.data.page_aligned)
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*(.data)
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. = ALIGN(8);
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__start_impls = .;
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*(.impls)
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KEEP(*(.impls))
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. = ALIGN(4);
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__stop_impls = .;
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*(.data.rel)
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*(.data.rel.*)
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CONSTRUCTORS
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} :text
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_edata = .; /* End+1 of .data */
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_sdata = .;
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*(.data*)
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. = ALIGN(8);
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_edata = .;
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} > RAM AT > ROM
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.noinit : {
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_snoinit = ABSOLUTE(.);
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*(.noinit*)
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_enoinit = ABSOLUTE(.);
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} > RAM
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.bss : { /* BSS */
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_sbss = .;
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*(.bss)
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. = ALIGN(1 << 3);
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} :text
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. = ALIGN(4096);
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_ebss = .;
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_szbss = _ebss - _sbss;
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.initstack : { /* INIT STACK */
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_s_initstack = .;
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*(.initstack)
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. = ALIGN(16);
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} :text
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. = ALIGN(4096);
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_e_initstack = . ;
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_szdata = _e_initstack - _sdata;
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*(.bss*)
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. = ALIGN(4096);
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_ebss = .;
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} > RAM
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/* Sections to be discarded */
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/DISCARD/ : {
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*(.exit.text)
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*(.exit.data)
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*(.exitcall.exit)
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*(.eh_frame)
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}
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/* Stabs debugging sections. */
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.stab 0 : { *(.stab) }
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.stabstr 0 : { *(.stabstr) }
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