SAML21: Add logic to support GLCK peripheral channels; add logic to configure FDPLL lock timer and ref clock GCLKs
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@ -232,6 +232,7 @@
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* BOARD_FDPLL96M_REFCLK - See OSCCTRL_DPLLCTRLB_REFLCK_* definitions
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* BOARD_FDPLL96M_REFCLK_CLKGEN - See GCLK_CLKCTRL_GEN* definitions
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* BOARD_FDPLL96M_LOCKTIME_ENABLE - Boolean (defined / not defined)
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* BOARD_FDPLL96M_LOCKTIME_CLKGEN - See GCLK_CLKCTRL_GEN* definitions
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*/
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#undef BOARD_FDPLL96M_ENABLE
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