PIC32MZ: Add IOPort header file and GPIO configuration logic
This commit is contained in:
Gregory Nutt
parent
04d122c31f
commit
1d23039eee
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@ -65,7 +65,7 @@ endif
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CHIP_ASRCS =
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CHIP_CSRCS = pic32mz-lowinit.c pic32mz-exception.c pic32mz-decodeirq.c
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CHIP_CSRCS += pic32mz-irq.c pic32mz-timerisr.c pic32mz-lowconsole.c
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CHIP_CSRCS += pic32mz-serial.c
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CHIP_CSRCS += pic32mz-irq.c pic32mz-timerisr.c pic32mz-gpio.c
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CHIP_CSRCS += pic32mz-lowconsole.c pic32mz-serial.c
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# Configuration-dependent PIC32MZ files
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@ -0,0 +1,859 @@
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/********************************************************************************************
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* arch/mips/src/pic32mz/pic32mz-ioport.h
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*
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* Copyright (C) 2015 Gregory Nutt. All rights reserved.
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* Author: Gregory Nutt <gnutt@nuttx.org>
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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*
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in
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* the documentation and/or other materials provided with the
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* distribution.
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* 3. Neither the name NuttX nor the names of its contributors may be
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* used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
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* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
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* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
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* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
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* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
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* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
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* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*
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********************************************************************************************/
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#ifndef __ARCH_MIPS_SRC_PIC32MZ_CHIP_PIC32MZ_IOPORT_H
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#define __ARCH_MIPS_SRC_PIC32MZ_CHIP_PIC32MZ_IOPORT_H
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/********************************************************************************************
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* Included Files
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********************************************************************************************/
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#include <nuttx/config.h>
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#include <arch/pic32mz/chip.h>
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#include "pic32mz-memorymap.h"
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#if CHIP_NPORTS > 0
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/********************************************************************************************
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* Pre-processor Definitions
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********************************************************************************************/
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/* IOPort Peripheral Offsets ****************************************************************/
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#define PI32MZ_IOPORTA 0
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#define PI32MZ_IOPORTB 1
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#define PI32MZ_IOPORTC 2
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#define PI32MZ_IOPORTD 3
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#define PI32MZ_IOPORTE 4
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#define PI32MZ_IOPORTF 5
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#define PI32MZ_IOPORTG 6
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#define PI32MZ_IOPORTH 7
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#define PI32MZ_IOPORTJ 8
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#define PI32MZ_IOPORTK 9
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#define PIC32MZ_IOPORTn_OFFSET(n) ((n)<<8)
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# define PIC32MZ_IOPORTA_OFFSET 0x0000
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# define PIC32MZ_IOPORTB_OFFSET 0x0100
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# define PIC32MZ_IOPORTC_OFFSET 0x0200
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# define PIC32MZ_IOPORTD_OFFSET 0x0300
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# define PIC32MZ_IOPORTE_OFFSET 0x0400
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# define PIC32MZ_IOPORTF_OFFSET 0x0500
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# define PIC32MZ_IOPORTG_OFFSET 0x0600
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# define PIC32MZ_IOPORTH_OFFSET 0x0700
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# define PIC32MZ_IOPORTJ_OFFSET 0x0800
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# define PIC32MZ_IOPORTK_OFFSET 0x0900
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/* Register Offsets *************************************************************************/
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#define PIC32MZ_IOPORT_ANSEL_OFFSET 0x0000 /* Analog select register */
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#define PIC32MZ_IOPORT_ANSELCLR_OFFSET 0x0004 /* Analog select clear register */
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#define PIC32MZ_IOPORT_ANSELSET_OFFSET 0x0008 /* Analog select set register */
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#define PIC32MZ_IOPORT_ANSELINV_OFFSET 0x000c /* Analog select invert register */
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#define PIC32MZ_IOPORT_TRIS_OFFSET 0x0010 /* Tri-state register */
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#define PIC32MZ_IOPORT_TRISCLR_OFFSET 0x0014 /* Tri-state clear register */
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#define PIC32MZ_IOPORT_TRISSET_OFFSET 0x0018 /* Tri-state set register */
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#define PIC32MZ_IOPORT_TRISINV_OFFSET 0x001c /* Tri-state invert register */
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#define PIC32MZ_IOPORT_PORT_OFFSET 0x0020 /* Port register */
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#define PIC32MZ_IOPORT_PORTCLR_OFFSET 0x0024 /* Port clear register */
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#define PIC32MZ_IOPORT_PORTSET_OFFSET 0x0028 /* Port set register */
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#define PIC32MZ_IOPORT_PORTINV_OFFSET 0x002c /* Port invert register */
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#define PIC32MZ_IOPORT_LAT_OFFSET 0x0030 /* Port data latch register */
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#define PIC32MZ_IOPORT_LATCLR_OFFSET 0x0034 /* Port data latch clear register */
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#define PIC32MZ_IOPORT_LATSET_OFFSET 0x0038 /* Port data latch set register */
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#define PIC32MZ_IOPORT_LATINV_OFFSET 0x003c /* Port data latch invert register */
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#define PIC32MZ_IOPORT_ODC_OFFSET 0x0040 /* Open drain control register */
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#define PIC32MZ_IOPORT_ODCCLR_OFFSET 0x0044 /* Open drain control clear register */
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#define PIC32MZ_IOPORT_ODCSET_OFFSET 0x0048 /* Open drain control set register */
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#define PIC32MZ_IOPORT_ODCINV_OFFSET 0x004c /* Open drain control invert register */
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#define PIC32MZ_IOPORT_CNPU_OFFSET 0x0050 /* Change Notice Pull-up register */
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#define PIC32MZ_IOPORT_CNPUCLR_OFFSET 0x0054 /* Change Notice Pull-up clear register */
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#define PIC32MZ_IOPORT_CNPUSET_OFFSET 0x0058 /* Change Notice Pull-up set register */
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#define PIC32MZ_IOPORT_CNPUINV_OFFSET 0x005c /* Change Notice Pull-up invert register */
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#define PIC32MZ_IOPORT_CNPD_OFFSET 0x0060 /* Change Notice Pull-down register */
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#define PIC32MZ_IOPORT_CNPDCLR_OFFSET 0x0064 /* Change Notice Pull-down clear register */
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#define PIC32MZ_IOPORT_CNPDSET_OFFSET 0x0068 /* Change Notice Pull-down set register */
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#define PIC32MZ_IOPORT_CNPDINV_OFFSET 0x006c /* Change Notice Pull-down invert register */
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#define PIC32MZ_IOPORT_CNCON_OFFSET 0x0070 /* Change Notice Control register */
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#define PIC32MZ_IOPORT_CNCONCLR_OFFSET 0x0074 /* Change Notice Control clear register */
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#define PIC32MZ_IOPORT_CNCONSET_OFFSET 0x0078 /* Change Notice Control set register */
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#define PIC32MZ_IOPORT_CNCONINV_OFFSET 0x007c /* Change Notice Control invert register */
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#define PIC32MZ_IOPORT_CNEN_OFFSET 0x0080 /* Change Notice Interrupt Enable register */
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#define PIC32MZ_IOPORT_CNENCLR_OFFSET 0x0084 /* Change Notice Interrupt Enable clear register */
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#define PIC32MZ_IOPORT_CNENSET_OFFSET 0x0088 /* Change Notice Interrupt Enable set register */
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#define PIC32MZ_IOPORT_CNENINV_OFFSET 0x008c /* Change Notice Interrupt Enable invert register */
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#define PIC32MZ_IOPORT_CNSTAT_OFFSET 0x0080 /* Change Notice Control register */
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#define PIC32MZ_IOPORT_CNSTATCLR_OFFSET 0x0084 /* Change Notice Control clear register*/
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#define PIC32MZ_IOPORT_CNSTATSET_OFFSET 0x0088 /* Change Notice Control set register */
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#define PIC32MZ_IOPORT_CNSTATINV_OFFSET 0x008c /* Change Notice Control invert register */
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/* IOPort Peripheral Addresses **************************************************************/
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#define PIC32MZ_IOPORTn_K1BASE(n) (PIC32MZ_IOPORT_K1BASE+PIC32MZ_IOPORTn_OFFSET(n))
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# define PIC32MZ_IOPORTA_K1BASE (PIC32MZ_IOPORT_K1BASE+PIC32MZ_IOPORTA_OFFSET)
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# define PIC32MZ_IOPORTB_K1BASE (PIC32MZ_IOPORT_K1BASE+PIC32MZ_IOPORTB_OFFSET)
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# define PIC32MZ_IOPORTC_K1BASE (PIC32MZ_IOPORT_K1BASE+PIC32MZ_IOPORTC_OFFSET)
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# define PIC32MZ_IOPORTD_K1BASE (PIC32MZ_IOPORT_K1BASE+PIC32MZ_IOPORTD_OFFSET)
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# define PIC32MZ_IOPORTE_K1BASE (PIC32MZ_IOPORT_K1BASE+PIC32MZ_IOPORTE_OFFSET)
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# define PIC32MZ_IOPORTF_K1BASE (PIC32MZ_IOPORT_K1BASE+PIC32MZ_IOPORTF_OFFSET)
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# define PIC32MZ_IOPORTG_K1BASE (PIC32MZ_IOPORT_K1BASE+PIC32MZ_IOPORTG_OFFSET)
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# define PIC32MZ_IOPORTH_K1BASE (PIC32MZ_IOPORT_K1BASE+PIC32MZ_IOPORTH_OFFSET)
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# define PIC32MZ_IOPORTJ_K1BASE (PIC32MZ_IOPORT_K1BASE+PIC32MZ_IOPORTJ_OFFSET)
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# define PIC32MZ_IOPORTK_K1BASE (PIC32MZ_IOPORT_K1BASE+PIC32MZ_IOPORTK_OFFSET)
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/* Register Addresses ***********************************************************************/
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#define PIC32MZ_IOPORT_ANSEL(n) (PIC32MZ_IOPORTn_K1BASE(n)+PIC32MZ_IOPORT_ANSEL_OFFSET)
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#define PIC32MZ_IOPORT_ANSELCLR(n) (PIC32MZ_IOPORTn_K1BASE(n)+PIC32MZ_IOPORT_ANSELCLR_OFFSET)
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#define PIC32MZ_IOPORT_ANSELSET(n) (PIC32MZ_IOPORTn_K1BASE(n)+PIC32MZ_IOPORT_ANSELSET_OFFSET)
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#define PIC32MZ_IOPORT_ANSELINV(n) (PIC32MZ_IOPORTn_K1BASE(n)+PIC32MZ_IOPORT_ANSELINV_OFFSET)
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#define PIC32MZ_IOPORT_TRIS(n) (PIC32MZ_IOPORTn_K1BASE(n)+PIC32MZ_IOPORT_TRIS_OFFSET)
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#define PIC32MZ_IOPORT_TRISCLR(n) (PIC32MZ_IOPORTn_K1BASE(n)+PIC32MZ_IOPORT_TRISCLR_OFFSET)
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#define PIC32MZ_IOPORT_TRISSET(n) (PIC32MZ_IOPORTn_K1BASE(n)+PIC32MZ_IOPORT_TRISSET_OFFSET)
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#define PIC32MZ_IOPORT_TRISINV(n) (PIC32MZ_IOPORTn_K1BASE(n)+PIC32MZ_IOPORT_TRISINV_OFFSET)
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#define PIC32MZ_IOPORT_PORT(n) (PIC32MZ_IOPORTn_K1BASE(n)+PIC32MZ_IOPORT_PORT_OFFSET)
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#define PIC32MZ_IOPORT_PORTCLR(n) (PIC32MZ_IOPORTn_K1BASE(n)+PIC32MZ_IOPORT_PORTCLR_OFFSET)
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#define PIC32MZ_IOPORT_PORTSET(n) (PIC32MZ_IOPORTn_K1BASE(n)+PIC32MZ_IOPORT_PORTSET_OFFSET)
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#define PIC32MZ_IOPORT_PORTINV(n) (PIC32MZ_IOPORTn_K1BASE(n)+PIC32MZ_IOPORT_PORTINV_OFFSET)
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#define PIC32MZ_IOPORT_LAT(n) (PIC32MZ_IOPORTn_K1BASE(n)+PIC32MZ_IOPORT_LAT_OFFSET)
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#define PIC32MZ_IOPORT_LATCLR(n) (PIC32MZ_IOPORTn_K1BASE(n)+PIC32MZ_IOPORT_LATCLR_OFFSET)
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#define PIC32MZ_IOPORT_LATSET(n) (PIC32MZ_IOPORTn_K1BASE(n)+PIC32MZ_IOPORT_LATSET_OFFSET)
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#define PIC32MZ_IOPORT_LATINV(n) (PIC32MZ_IOPORTn_K1BASE(n)+PIC32MZ_IOPORT_LATINV_OFFSET)
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#define PIC32MZ_IOPORT_ODC(n) (PIC32MZ_IOPORTn_K1BASE(n)+PIC32MZ_IOPORT_ODC_OFFSET)
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#define PIC32MZ_IOPORT_ODCCLR(n) (PIC32MZ_IOPORTn_K1BASE(n)+PIC32MZ_IOPORT_ODCCLR_OFFSET)
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#define PIC32MZ_IOPORT_ODCSET(n) (PIC32MZ_IOPORTn_K1BASE(n)+PIC32MZ_IOPORT_ODCSET_OFFSET)
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#define PIC32MZ_IOPORT_ODCINV(n) (PIC32MZ_IOPORTn_K1BASE(n)+PIC32MZ_IOPORT_ODCINV_OFFSET)
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#define PIC32MZ_IOPORT_CNPU(n) (PIC32MZ_IOPORTn_K1BASE(n)+PIC32MZ_IOPORT_CNPU_OFFSET)
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#define PIC32MZ_IOPORT_CNPUCLR(n) (PIC32MZ_IOPORTn_K1BASE(n)+PIC32MZ_IOPORT_CNPUCLR_OFFSET)
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#define PIC32MZ_IOPORT_CNPUSET(n) (PIC32MZ_IOPORTn_K1BASE(n)+PIC32MZ_IOPORT_CNPUSET_OFFSET)
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#define PIC32MZ_IOPORT_CNPUINV(n) (PIC32MZ_IOPORTn_K1BASE(n)+PIC32MZ_IOPORT_CNPUINV_OFFSET)
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#define PIC32MZ_IOPORT_CNPD(n) (PIC32MZ_IOPORTn_K1BASE(n)+PIC32MZ_IOPORT_CNPD_OFFSET)
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#define PIC32MZ_IOPORT_CNPDCLR(n) (PIC32MZ_IOPORTn_K1BASE(n)+PIC32MZ_IOPORT_CNPDCLR_OFFSET)
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#define PIC32MZ_IOPORT_CNPDSET(n) (PIC32MZ_IOPORTn_K1BASE(n)+PIC32MZ_IOPORT_CNPDSET_OFFSET)
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#define PIC32MZ_IOPORT_CNPDINV(n) (PIC32MZ_IOPORTn_K1BASE(n)+PIC32MZ_IOPORT_CNPDINV_OFFSET)
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#define PIC32MZ_IOPORT_CNCON(n) (PIC32MZ_IOPORTn_K1BASE(n)+PIC32MZ_IOPORT_CNCON_OFFSET)
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#define PIC32MZ_IOPORT_CNCONCLR(n) (PIC32MZ_IOPORTn_K1BASE(n)+PIC32MZ_IOPORT_CNCONCLR_OFFSET)
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#define PIC32MZ_IOPORT_CNCONSET(n) (PIC32MZ_IOPORTn_K1BASE(n)+PIC32MZ_IOPORT_CNCONSET_OFFSET)
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#define PIC32MZ_IOPORT_CNCONINV(n) (PIC32MZ_IOPORTn_K1BASE(n)+PIC32MZ_IOPORT_CNCONINV_OFFSET)
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#define PIC32MZ_IOPORT_CNEN(n) (PIC32MZ_IOPORTn_K1BASE(n)+PIC32MZ_IOPORT_CNEN_OFFSET)
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#define PIC32MZ_IOPORT_CNENCLR(n) (PIC32MZ_IOPORTn_K1BASE(n)+PIC32MZ_IOPORT_CNENCLR_OFFSET)
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#define PIC32MZ_IOPORT_CNENSET(n) (PIC32MZ_IOPORTn_K1BASE(n)+PIC32MZ_IOPORT_CNENSET_OFFSET)
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#define PIC32MZ_IOPORT_CNENINV(n) (PIC32MZ_IOPORTn_K1BASE(n)+PIC32MZ_IOPORT_CNENINV_OFFSET)
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#define PIC32MZ_IOPORT_CNSTAT(n) (PIC32MZ_IOPORTn_K1BASE(n)+PIC32MZ_IOPORT_CNSTAT_OFFSET)
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#define PIC32MZ_IOPORT_CNSTATCLR(n) (PIC32MZ_IOPORTn_K1BASE(n)+PIC32MZ_IOPORT_CNSTATCLR_OFFSET)
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#define PIC32MZ_IOPORT_CNSTATSET(n) (PIC32MZ_IOPORTn_K1BASE(n)+PIC32MZ_IOPORT_CNSTATSET_OFFSET)
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#define PIC32MZ_IOPORT_CNSTATINV(n) (PIC32MZ_IOPORTn_K1BASE(n)+PIC32MZ_IOPORT_CNSTATINV_OFFSET)
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/* Port A addresses */
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#define PIC32MZ_IOPORTA_ANSEL (PIC32MZ_IOPORTA_K1BASE+PIC32MZ_IOPORT_ANSEL_OFFSET)
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#define PIC32MZ_IOPORTA_ANSELCLR (PIC32MZ_IOPORTA_K1BASE+PIC32MZ_IOPORT_ANSELCLR_OFFSET)
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#define PIC32MZ_IOPORTA_ANSELSET (PIC32MZ_IOPORTA_K1BASE+PIC32MZ_IOPORT_ANSELSET_OFFSET)
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#define PIC32MZ_IOPORTA_ANSELINV (PIC32MZ_IOPORTA_K1BASE+PIC32MZ_IOPORT_ANSELINV_OFFSET)
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#define PIC32MZ_IOPORTA_TRIS (PIC32MZ_IOPORTA_K1BASE+PIC32MZ_IOPORT_TRIS_OFFSET)
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#define PIC32MZ_IOPORTA_TRISCLR (PIC32MZ_IOPORTA_K1BASE+PIC32MZ_IOPORT_TRISCLR_OFFSET)
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#define PIC32MZ_IOPORTA_TRISSET (PIC32MZ_IOPORTA_K1BASE+PIC32MZ_IOPORT_TRISSET_OFFSET)
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#define PIC32MZ_IOPORTA_TRISINV (PIC32MZ_IOPORTA_K1BASE+PIC32MZ_IOPORT_TRISINV_OFFSET)
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#define PIC32MZ_IOPORTA_PORT (PIC32MZ_IOPORTA_K1BASE+PIC32MZ_IOPORT_PORT_OFFSET)
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#define PIC32MZ_IOPORTA_PORTCLR (PIC32MZ_IOPORTA_K1BASE+PIC32MZ_IOPORT_PORTCLR_OFFSET)
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#define PIC32MZ_IOPORTA_PORTSET (PIC32MZ_IOPORTA_K1BASE+PIC32MZ_IOPORT_PORTSET_OFFSET)
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#define PIC32MZ_IOPORTA_PORTINV (PIC32MZ_IOPORTA_K1BASE+PIC32MZ_IOPORT_PORTINV_OFFSET)
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#define PIC32MZ_IOPORTA_LAT (PIC32MZ_IOPORTA_K1BASE+PIC32MZ_IOPORT_LAT_OFFSET)
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#define PIC32MZ_IOPORTA_LATCLR (PIC32MZ_IOPORTA_K1BASE+PIC32MZ_IOPORT_LATCLR_OFFSET)
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#define PIC32MZ_IOPORTA_LATSET (PIC32MZ_IOPORTA_K1BASE+PIC32MZ_IOPORT_LATSET_OFFSET)
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#define PIC32MZ_IOPORTA_LATINV (PIC32MZ_IOPORTA_K1BASE+PIC32MZ_IOPORT_LATINV_OFFSET)
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#define PIC32MZ_IOPORTA_ODC (PIC32MZ_IOPORTA_K1BASE+PIC32MZ_IOPORT_ODC_OFFSET)
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#define PIC32MZ_IOPORTA_ODCCLR (PIC32MZ_IOPORTA_K1BASE+PIC32MZ_IOPORT_ODCCLR_OFFSET)
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#define PIC32MZ_IOPORTA_ODCSET (PIC32MZ_IOPORTA_K1BASE+PIC32MZ_IOPORT_ODCSET_OFFSET)
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#define PIC32MZ_IOPORTA_ODCINV (PIC32MZ_IOPORTA_K1BASE+PIC32MZ_IOPORT_ODCINV_OFFSET)
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#define PIC32MZ_IOPORTA_CNPU (PIC32MZ_IOPORTA_K1BASE+PIC32MZ_IOPORT_CNPU_OFFSET)
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#define PIC32MZ_IOPORTA_CNPUCLR (PIC32MZ_IOPORTA_K1BASE+PIC32MZ_IOPORT_CNPUCLR_OFFSET)
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#define PIC32MZ_IOPORTA_CNPUSET (PIC32MZ_IOPORTA_K1BASE+PIC32MZ_IOPORT_CNPUSET_OFFSET)
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#define PIC32MZ_IOPORTA_CNPUINV (PIC32MZ_IOPORTA_K1BASE+PIC32MZ_IOPORT_CNPUINV_OFFSET)
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#define PIC32MZ_IOPORTA_CNPD (PIC32MZ_IOPORTA_K1BASE+PIC32MZ_IOPORT_CNPD_OFFSET)
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#define PIC32MZ_IOPORTA_CNPDCLR (PIC32MZ_IOPORTA_K1BASE+PIC32MZ_IOPORT_CNPDCLR_OFFSET)
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#define PIC32MZ_IOPORTA_CNPDSET (PIC32MZ_IOPORTA_K1BASE+PIC32MZ_IOPORT_CNPDSET_OFFSET)
|
||||
#define PIC32MZ_IOPORTA_CNPDINV (PIC32MZ_IOPORTA_K1BASE+PIC32MZ_IOPORT_CNPDINV_OFFSET)
|
||||
|
||||
#define PIC32MZ_IOPORTA_CNCON (PIC32MZ_IOPORTA_K1BASE+PIC32MZ_IOPORT_CNCON_OFFSET)
|
||||
#define PIC32MZ_IOPORTA_CNCONCLR (PIC32MZ_IOPORTA_K1BASE+PIC32MZ_IOPORT_CNCONCLR_OFFSET)
|
||||
#define PIC32MZ_IOPORTA_CNCONSET (PIC32MZ_IOPORTA_K1BASE+PIC32MZ_IOPORT_CNCONSET_OFFSET)
|
||||
#define PIC32MZ_IOPORTA_CNCONINV (PIC32MZ_IOPORTA_K1BASE+PIC32MZ_IOPORT_CNCONINV_OFFSET)
|
||||
|
||||
#define PIC32MZ_IOPORTA_CNEN (PIC32MZ_IOPORTA_K1BASE+PIC32MZ_IOPORT_CNEN_OFFSET)
|
||||
#define PIC32MZ_IOPORTA_CNENCLR (PIC32MZ_IOPORTA_K1BASE+PIC32MZ_IOPORT_CNENCLR_OFFSET)
|
||||
#define PIC32MZ_IOPORTA_CNENSET (PIC32MZ_IOPORTA_K1BASE+PIC32MZ_IOPORT_CNENSET_OFFSET)
|
||||
#define PIC32MZ_IOPORTA_CNENINV (PIC32MZ_IOPORTA_K1BASE+PIC32MZ_IOPORT_CNENINV_OFFSET)
|
||||
|
||||
#define PIC32MZ_IOPORTA_CNSTAT (PIC32MZ_IOPORTA_K1BASE+PIC32MZ_IOPORT_CNSTAT_OFFSET)
|
||||
#define PIC32MZ_IOPORTA_CNSTATCLR (PIC32MZ_IOPORTA_K1BASE+PIC32MZ_IOPORT_CNSTATCLR_OFFSET)
|
||||
#define PIC32MZ_IOPORTA_CNSTATSET (PIC32MZ_IOPORTA_K1BASE+PIC32MZ_IOPORT_CNSTATSET_OFFSET)
|
||||
#define PIC32MZ_IOPORTA_CNSTATINV (PIC32MZ_IOPORTA_K1BASE+PIC32MZ_IOPORT_CNSTATINV_OFFSET)
|
||||
|
||||
#if CHIP_NPORTS > 0
|
||||
/* Port B addresses */
|
||||
|
||||
# define PIC32MZ_IOPORTB_ANSEL (PIC32MZ_IOPORTB_K1BASE+PIC32MZ_IOPORT_ANSEL_OFFSET)
|
||||
# define PIC32MZ_IOPORTB_ANSELCLR (PIC32MZ_IOPORTB_K1BASE+PIC32MZ_IOPORT_ANSELCLR_OFFSET)
|
||||
# define PIC32MZ_IOPORTB_ANSELSET (PIC32MZ_IOPORTB_K1BASE+PIC32MZ_IOPORT_ANSELSET_OFFSET)
|
||||
# define PIC32MZ_IOPORTB_ANSELINV (PIC32MZ_IOPORTB_K1BASE+PIC32MZ_IOPORT_ANSELINV_OFFSET)
|
||||
|
||||
# define PIC32MZ_IOPORTB_TRIS (PIC32MZ_IOPORTB_K1BASE+PIC32MZ_IOPORT_TRIS_OFFSET)
|
||||
# define PIC32MZ_IOPORTB_TRISCLR (PIC32MZ_IOPORTB_K1BASE+PIC32MZ_IOPORT_TRISCLR_OFFSET)
|
||||
# define PIC32MZ_IOPORTB_TRISSET (PIC32MZ_IOPORTB_K1BASE+PIC32MZ_IOPORT_TRISSET_OFFSET)
|
||||
# define PIC32MZ_IOPORTB_TRISINV (PIC32MZ_IOPORTB_K1BASE+PIC32MZ_IOPORT_TRISINV_OFFSET)
|
||||
|
||||
# define PIC32MZ_IOPORTB_PORT (PIC32MZ_IOPORTB_K1BASE+PIC32MZ_IOPORT_PORT_OFFSET)
|
||||
# define PIC32MZ_IOPORTB_PORTCLR (PIC32MZ_IOPORTB_K1BASE+PIC32MZ_IOPORT_PORTCLR_OFFSET)
|
||||
# define PIC32MZ_IOPORTB_PORTSET (PIC32MZ_IOPORTB_K1BASE+PIC32MZ_IOPORT_PORTSET_OFFSET)
|
||||
# define PIC32MZ_IOPORTB_PORTINV (PIC32MZ_IOPORTB_K1BASE+PIC32MZ_IOPORT_PORTINV_OFFSET)
|
||||
|
||||
# define PIC32MZ_IOPORTB_LAT (PIC32MZ_IOPORTB_K1BASE+PIC32MZ_IOPORT_LAT_OFFSET)
|
||||
# define PIC32MZ_IOPORTB_LATCLR (PIC32MZ_IOPORTB_K1BASE+PIC32MZ_IOPORT_LATCLR_OFFSET)
|
||||
# define PIC32MZ_IOPORTB_LATSET (PIC32MZ_IOPORTB_K1BASE+PIC32MZ_IOPORT_LATSET_OFFSET)
|
||||
# define PIC32MZ_IOPORTB_LATINV (PIC32MZ_IOPORTB_K1BASE+PIC32MZ_IOPORT_LATINV_OFFSET)
|
||||
|
||||
# define PIC32MZ_IOPORTB_ODC (PIC32MZ_IOPORTB_K1BASE+PIC32MZ_IOPORT_ODC_OFFSET)
|
||||
# define PIC32MZ_IOPORTB_ODCCLR (PIC32MZ_IOPORTB_K1BASE+PIC32MZ_IOPORT_ODCCLR_OFFSET)
|
||||
# define PIC32MZ_IOPORTB_ODCSET (PIC32MZ_IOPORTB_K1BASE+PIC32MZ_IOPORT_ODCSET_OFFSET)
|
||||
# define PIC32MZ_IOPORTB_ODCINV (PIC32MZ_IOPORTB_K1BASE+PIC32MZ_IOPORT_ODCINV_OFFSET)
|
||||
|
||||
# define PIC32MZ_IOPORTB_CNPU (PIC32MZ_IOPORTB_K1BASE+PIC32MZ_IOPORT_CNPU_OFFSET)
|
||||
# define PIC32MZ_IOPORTB_CNPUCLR (PIC32MZ_IOPORTB_K1BASE+PIC32MZ_IOPORT_CNPUCLR_OFFSET)
|
||||
# define PIC32MZ_IOPORTB_CNPUSET (PIC32MZ_IOPORTB_K1BASE+PIC32MZ_IOPORT_CNPUSET_OFFSET)
|
||||
# define PIC32MZ_IOPORTB_CNPUINV (PIC32MZ_IOPORTB_K1BASE+PIC32MZ_IOPORT_CNPUINV_OFFSET)
|
||||
|
||||
# define PIC32MZ_IOPORTB_CNPD (PIC32MZ_IOPORTB_K1BASE+PIC32MZ_IOPORT_CNPD_OFFSET)
|
||||
# define PIC32MZ_IOPORTB_CNPDCLR (PIC32MZ_IOPORTB_K1BASE+PIC32MZ_IOPORT_CNPDCLR_OFFSET)
|
||||
# define PIC32MZ_IOPORTB_CNPDSET (PIC32MZ_IOPORTB_K1BASE+PIC32MZ_IOPORT_CNPDSET_OFFSET)
|
||||
# define PIC32MZ_IOPORTB_CNPDINV (PIC32MZ_IOPORTB_K1BASE+PIC32MZ_IOPORT_CNPDINV_OFFSET)
|
||||
|
||||
# define PIC32MZ_IOPORTB_CNCON (PIC32MZ_IOPORTB_K1BASE+PIC32MZ_IOPORT_CNCON_OFFSET)
|
||||
# define PIC32MZ_IOPORTB_CNCONCLR (PIC32MZ_IOPORTB_K1BASE+PIC32MZ_IOPORT_CNCONCLR_OFFSET)
|
||||
# define PIC32MZ_IOPORTB_CNCONSET (PIC32MZ_IOPORTB_K1BASE+PIC32MZ_IOPORT_CNCONSET_OFFSET)
|
||||
# define PIC32MZ_IOPORTB_CNCONINV (PIC32MZ_IOPORTB_K1BASE+PIC32MZ_IOPORT_CNCONINV_OFFSET)
|
||||
|
||||
# define PIC32MZ_IOPORTB_CNEN (PIC32MZ_IOPORTB_K1BASE+PIC32MZ_IOPORT_CNEN_OFFSET)
|
||||
# define PIC32MZ_IOPORTB_CNENCLR (PIC32MZ_IOPORTB_K1BASE+PIC32MZ_IOPORT_CNENCLR_OFFSET)
|
||||
# define PIC32MZ_IOPORTB_CNENSET (PIC32MZ_IOPORTB_K1BASE+PIC32MZ_IOPORT_CNENSET_OFFSET)
|
||||
# define PIC32MZ_IOPORTB_CNENINV (PIC32MZ_IOPORTB_K1BASE+PIC32MZ_IOPORT_CNENINV_OFFSET)
|
||||
|
||||
# define PIC32MZ_IOPORTB_CNSTAT (PIC32MZ_IOPORTB_K1BASE+PIC32MZ_IOPORT_CNSTAT_OFFSET)
|
||||
# define PIC32MZ_IOPORTB_CNSTATCLR (PIC32MZ_IOPORTB_K1BASE+PIC32MZ_IOPORT_CNSTATCLR_OFFSET)
|
||||
# define PIC32MZ_IOPORTB_CNSTATSET (PIC32MZ_IOPORTB_K1BASE+PIC32MZ_IOPORT_CNSTATSET_OFFSET)
|
||||
# define PIC32MZ_IOPORTB_CNSTATINV (PIC32MZ_IOPORTB_K1BASE+PIC32MZ_IOPORT_CNSTATINV_OFFSET)
|
||||
#endif
|
||||
|
||||
#if CHIP_NPORTS > 1
|
||||
/* Port C addresses */
|
||||
|
||||
# define PIC32MZ_IOPORTC_ANSEL (PIC32MZ_IOPORTC_K1BASE+PIC32MZ_IOPORT_ANSEL_OFFSET)
|
||||
# define PIC32MZ_IOPORTC_ANSELCLR (PIC32MZ_IOPORTC_K1BASE+PIC32MZ_IOPORT_ANSELCLR_OFFSET)
|
||||
# define PIC32MZ_IOPORTC_ANSELSET (PIC32MZ_IOPORTC_K1BASE+PIC32MZ_IOPORT_ANSELSET_OFFSET)
|
||||
# define PIC32MZ_IOPORTC_ANSELINV (PIC32MZ_IOPORTC_K1BASE+PIC32MZ_IOPORT_ANSELINV_OFFSET)
|
||||
|
||||
# define PIC32MZ_IOPORTC_TRIS (PIC32MZ_IOPORTC_K1BASE+PIC32MZ_IOPORT_TRIS_OFFSET)
|
||||
# define PIC32MZ_IOPORTC_TRISCLR (PIC32MZ_IOPORTC_K1BASE+PIC32MZ_IOPORT_TRISCLR_OFFSET)
|
||||
# define PIC32MZ_IOPORTC_TRISSET (PIC32MZ_IOPORTC_K1BASE+PIC32MZ_IOPORT_TRISSET_OFFSET)
|
||||
# define PIC32MZ_IOPORTC_TRISINV (PIC32MZ_IOPORTC_K1BASE+PIC32MZ_IOPORT_TRISINV_OFFSET)
|
||||
|
||||
# define PIC32MZ_IOPORTC_PORT (PIC32MZ_IOPORTC_K1BASE+PIC32MZ_IOPORT_PORT_OFFSET)
|
||||
# define PIC32MZ_IOPORTC_PORTCLR (PIC32MZ_IOPORTC_K1BASE+PIC32MZ_IOPORT_PORTCLR_OFFSET)
|
||||
# define PIC32MZ_IOPORTC_PORTSET (PIC32MZ_IOPORTC_K1BASE+PIC32MZ_IOPORT_PORTSET_OFFSET)
|
||||
# define PIC32MZ_IOPORTC_PORTINV (PIC32MZ_IOPORTC_K1BASE+PIC32MZ_IOPORT_PORTINV_OFFSET)
|
||||
|
||||
# define PIC32MZ_IOPORTC_LAT (PIC32MZ_IOPORTC_K1BASE+PIC32MZ_IOPORT_LAT_OFFSET)
|
||||
# define PIC32MZ_IOPORTC_LATCLR (PIC32MZ_IOPORTC_K1BASE+PIC32MZ_IOPORT_LATCLR_OFFSET)
|
||||
# define PIC32MZ_IOPORTC_LATSET (PIC32MZ_IOPORTC_K1BASE+PIC32MZ_IOPORT_LATSET_OFFSET)
|
||||
# define PIC32MZ_IOPORTC_LATINV (PIC32MZ_IOPORTC_K1BASE+PIC32MZ_IOPORT_LATINV_OFFSET)
|
||||
|
||||
# define PIC32MZ_IOPORTC_ODC (PIC32MZ_IOPORTC_K1BASE+PIC32MZ_IOPORT_ODC_OFFSET)
|
||||
# define PIC32MZ_IOPORTC_ODCCLR (PIC32MZ_IOPORTC_K1BASE+PIC32MZ_IOPORT_ODCCLR_OFFSET)
|
||||
# define PIC32MZ_IOPORTC_ODCSET (PIC32MZ_IOPORTC_K1BASE+PIC32MZ_IOPORT_ODCSET_OFFSET)
|
||||
# define PIC32MZ_IOPORTC_ODCINV (PIC32MZ_IOPORTC_K1BASE+PIC32MZ_IOPORT_ODCINV_OFFSET)
|
||||
|
||||
# define PIC32MZ_IOPORTC_CNPU (PIC32MZ_IOPORTC_K1BASE+PIC32MZ_IOPORT_CNPU_OFFSET)
|
||||
# define PIC32MZ_IOPORTC_CNPUCLR (PIC32MZ_IOPORTC_K1BASE+PIC32MZ_IOPORT_CNPUCLR_OFFSET)
|
||||
# define PIC32MZ_IOPORTC_CNPUSET (PIC32MZ_IOPORTC_K1BASE+PIC32MZ_IOPORT_CNPUSET_OFFSET)
|
||||
# define PIC32MZ_IOPORTC_CNPUINV (PIC32MZ_IOPORTC_K1BASE+PIC32MZ_IOPORT_CNPUINV_OFFSET)
|
||||
|
||||
# define PIC32MZ_IOPORTC_CNPD (PIC32MZ_IOPORTC_K1BASE+PIC32MZ_IOPORT_CNPD_OFFSET)
|
||||
# define PIC32MZ_IOPORTC_CNPDCLR (PIC32MZ_IOPORTC_K1BASE+PIC32MZ_IOPORT_CNPDCLR_OFFSET)
|
||||
# define PIC32MZ_IOPORTC_CNPDSET (PIC32MZ_IOPORTC_K1BASE+PIC32MZ_IOPORT_CNPDSET_OFFSET)
|
||||
# define PIC32MZ_IOPORTC_CNPDINV (PIC32MZ_IOPORTC_K1BASE+PIC32MZ_IOPORT_CNPDINV_OFFSET)
|
||||
|
||||
# define PIC32MZ_IOPORTC_CNCON (PIC32MZ_IOPORTC_K1BASE+PIC32MZ_IOPORT_CNCON_OFFSET)
|
||||
# define PIC32MZ_IOPORTC_CNCONCLR (PIC32MZ_IOPORTC_K1BASE+PIC32MZ_IOPORT_CNCONCLR_OFFSET)
|
||||
# define PIC32MZ_IOPORTC_CNCONSET (PIC32MZ_IOPORTC_K1BASE+PIC32MZ_IOPORT_CNCONSET_OFFSET)
|
||||
# define PIC32MZ_IOPORTC_CNCONINV (PIC32MZ_IOPORTC_K1BASE+PIC32MZ_IOPORT_CNCONINV_OFFSET)
|
||||
|
||||
# define PIC32MZ_IOPORTC_CNEN (PIC32MZ_IOPORTC_K1BASE+PIC32MZ_IOPORT_CNEN_OFFSET)
|
||||
# define PIC32MZ_IOPORTC_CNENCLR (PIC32MZ_IOPORTC_K1BASE+PIC32MZ_IOPORT_CNENCLR_OFFSET)
|
||||
# define PIC32MZ_IOPORTC_CNENSET (PIC32MZ_IOPORTC_K1BASE+PIC32MZ_IOPORT_CNENSET_OFFSET)
|
||||
# define PIC32MZ_IOPORTC_CNENINV (PIC32MZ_IOPORTC_K1BASE+PIC32MZ_IOPORT_CNENINV_OFFSET)
|
||||
|
||||
# define PIC32MZ_IOPORTC_CNSTAT (PIC32MZ_IOPORTC_K1BASE+PIC32MZ_IOPORT_CNSTAT_OFFSET)
|
||||
# define PIC32MZ_IOPORTC_CNSTATCLR (PIC32MZ_IOPORTC_K1BASE+PIC32MZ_IOPORT_CNSTATCLR_OFFSET)
|
||||
# define PIC32MZ_IOPORTC_CNSTATSET (PIC32MZ_IOPORTC_K1BASE+PIC32MZ_IOPORT_CNSTATSET_OFFSET)
|
||||
# define PIC32MZ_IOPORTC_CNSTATINV (PIC32MZ_IOPORTC_K1BASE+PIC32MZ_IOPORT_CNSTATINV_OFFSET)
|
||||
#endif
|
||||
|
||||
#if CHIP_NPORTS > 2
|
||||
/* Port D addresses */
|
||||
|
||||
# define PIC32MZ_IOPORTD_ANSEL (PIC32MZ_IOPORTD_K1BASE+PIC32MZ_IOPORT_ANSEL_OFFSET)
|
||||
# define PIC32MZ_IOPORTD_ANSELCLR (PIC32MZ_IOPORTD_K1BASE+PIC32MZ_IOPORT_ANSELCLR_OFFSET)
|
||||
# define PIC32MZ_IOPORTD_ANSELSET (PIC32MZ_IOPORTD_K1BASE+PIC32MZ_IOPORT_ANSELSET_OFFSET)
|
||||
# define PIC32MZ_IOPORTD_ANSELINV (PIC32MZ_IOPORTD_K1BASE+PIC32MZ_IOPORT_ANSELINV_OFFSET)
|
||||
|
||||
# define PIC32MZ_IOPORTD_TRIS (PIC32MZ_IOPORTD_K1BASE+PIC32MZ_IOPORT_TRIS_OFFSET)
|
||||
# define PIC32MZ_IOPORTD_TRISCLR (PIC32MZ_IOPORTD_K1BASE+PIC32MZ_IOPORT_TRISCLR_OFFSET)
|
||||
# define PIC32MZ_IOPORTD_TRISSET (PIC32MZ_IOPORTD_K1BASE+PIC32MZ_IOPORT_TRISSET_OFFSET)
|
||||
# define PIC32MZ_IOPORTD_TRISINV (PIC32MZ_IOPORTD_K1BASE+PIC32MZ_IOPORT_TRISINV_OFFSET)
|
||||
|
||||
# define PIC32MZ_IOPORTD_PORT (PIC32MZ_IOPORTD_K1BASE+PIC32MZ_IOPORT_PORT_OFFSET)
|
||||
# define PIC32MZ_IOPORTD_PORTCLR (PIC32MZ_IOPORTD_K1BASE+PIC32MZ_IOPORT_PORTCLR_OFFSET)
|
||||
# define PIC32MZ_IOPORTD_PORTSET (PIC32MZ_IOPORTD_K1BASE+PIC32MZ_IOPORT_PORTSET_OFFSET)
|
||||
# define PIC32MZ_IOPORTD_PORTINV (PIC32MZ_IOPORTD_K1BASE+PIC32MZ_IOPORT_PORTINV_OFFSET)
|
||||
|
||||
# define PIC32MZ_IOPORTD_LAT (PIC32MZ_IOPORTD_K1BASE+PIC32MZ_IOPORT_LAT_OFFSET)
|
||||
# define PIC32MZ_IOPORTD_LATCLR (PIC32MZ_IOPORTD_K1BASE+PIC32MZ_IOPORT_LATCLR_OFFSET)
|
||||
# define PIC32MZ_IOPORTD_LATSET (PIC32MZ_IOPORTD_K1BASE+PIC32MZ_IOPORT_LATSET_OFFSET)
|
||||
# define PIC32MZ_IOPORTD_LATINV (PIC32MZ_IOPORTD_K1BASE+PIC32MZ_IOPORT_LATINV_OFFSET)
|
||||
|
||||
# define PIC32MZ_IOPORTD_ODC (PIC32MZ_IOPORTD_K1BASE+PIC32MZ_IOPORT_ODC_OFFSET)
|
||||
# define PIC32MZ_IOPORTD_ODCCLR (PIC32MZ_IOPORTD_K1BASE+PIC32MZ_IOPORT_ODCCLR_OFFSET)
|
||||
# define PIC32MZ_IOPORTD_ODCSET (PIC32MZ_IOPORTD_K1BASE+PIC32MZ_IOPORT_ODCSET_OFFSET)
|
||||
# define PIC32MZ_IOPORTD_ODCINV (PIC32MZ_IOPORTD_K1BASE+PIC32MZ_IOPORT_ODCINV_OFFSET)
|
||||
|
||||
# define PIC32MZ_IOPORTD_CNPU (PIC32MZ_IOPORTD_K1BASE+PIC32MZ_IOPORT_CNPU_OFFSET)
|
||||
# define PIC32MZ_IOPORTD_CNPUCLR (PIC32MZ_IOPORTD_K1BASE+PIC32MZ_IOPORT_CNPUCLR_OFFSET)
|
||||
# define PIC32MZ_IOPORTD_CNPUSET (PIC32MZ_IOPORTD_K1BASE+PIC32MZ_IOPORT_CNPUSET_OFFSET)
|
||||
# define PIC32MZ_IOPORTD_CNPUINV (PIC32MZ_IOPORTD_K1BASE+PIC32MZ_IOPORT_CNPUINV_OFFSET)
|
||||
|
||||
# define PIC32MZ_IOPORTD_CNPD (PIC32MZ_IOPORTD_K1BASE+PIC32MZ_IOPORT_CNPD_OFFSET)
|
||||
# define PIC32MZ_IOPORTD_CNPDCLR (PIC32MZ_IOPORTD_K1BASE+PIC32MZ_IOPORT_CNPDCLR_OFFSET)
|
||||
# define PIC32MZ_IOPORTD_CNPDSET (PIC32MZ_IOPORTD_K1BASE+PIC32MZ_IOPORT_CNPDSET_OFFSET)
|
||||
# define PIC32MZ_IOPORTD_CNPDINV (PIC32MZ_IOPORTD_K1BASE+PIC32MZ_IOPORT_CNPDINV_OFFSET)
|
||||
|
||||
# define PIC32MZ_IOPORTD_CNCON (PIC32MZ_IOPORTD_K1BASE+PIC32MZ_IOPORT_CNCON_OFFSET)
|
||||
# define PIC32MZ_IOPORTD_CNCONCLR (PIC32MZ_IOPORTD_K1BASE+PIC32MZ_IOPORT_CNCONCLR_OFFSET)
|
||||
# define PIC32MZ_IOPORTD_CNCONSET (PIC32MZ_IOPORTD_K1BASE+PIC32MZ_IOPORT_CNCONSET_OFFSET)
|
||||
# define PIC32MZ_IOPORTD_CNCONINV (PIC32MZ_IOPORTD_K1BASE+PIC32MZ_IOPORT_CNCONINV_OFFSET)
|
||||
|
||||
# define PIC32MZ_IOPORTD_CNEN (PIC32MZ_IOPORTD_K1BASE+PIC32MZ_IOPORT_CNEN_OFFSET)
|
||||
# define PIC32MZ_IOPORTD_CNENCLR (PIC32MZ_IOPORTD_K1BASE+PIC32MZ_IOPORT_CNENCLR_OFFSET)
|
||||
# define PIC32MZ_IOPORTD_CNENSET (PIC32MZ_IOPORTD_K1BASE+PIC32MZ_IOPORT_CNENSET_OFFSET)
|
||||
# define PIC32MZ_IOPORTD_CNENINV (PIC32MZ_IOPORTD_K1BASE+PIC32MZ_IOPORT_CNENINV_OFFSET)
|
||||
|
||||
# define PIC32MZ_IOPORTD_CNSTAT (PIC32MZ_IOPORTD_K1BASE+PIC32MZ_IOPORT_CNSTAT_OFFSET)
|
||||
# define PIC32MZ_IOPORTD_CNSTATCLR (PIC32MZ_IOPORTD_K1BASE+PIC32MZ_IOPORT_CNSTATCLR_OFFSET)
|
||||
# define PIC32MZ_IOPORTD_CNSTATSET (PIC32MZ_IOPORTD_K1BASE+PIC32MZ_IOPORT_CNSTATSET_OFFSET)
|
||||
# define PIC32MZ_IOPORTD_CNSTATINV (PIC32MZ_IOPORTD_K1BASE+PIC32MZ_IOPORT_CNSTATINV_OFFSET)
|
||||
#endif
|
||||
|
||||
#if CHIP_NPORTS > 3
|
||||
/* Port E addresses */
|
||||
|
||||
# define PIC32MZ_IOPORTE_ANSEL (PIC32MZ_IOPORTE_K1BASE+PIC32MZ_IOPORT_ANSEL_OFFSET)
|
||||
# define PIC32MZ_IOPORTE_ANSELCLR (PIC32MZ_IOPORTE_K1BASE+PIC32MZ_IOPORT_ANSELCLR_OFFSET)
|
||||
# define PIC32MZ_IOPORTE_ANSELSET (PIC32MZ_IOPORTE_K1BASE+PIC32MZ_IOPORT_ANSELSET_OFFSET)
|
||||
# define PIC32MZ_IOPORTE_ANSELINV (PIC32MZ_IOPORTE_K1BASE+PIC32MZ_IOPORT_ANSELINV_OFFSET)
|
||||
|
||||
# define PIC32MZ_IOPORTE_TRIS (PIC32MZ_IOPORTE_K1BASE+PIC32MZ_IOPORT_TRIS_OFFSET)
|
||||
# define PIC32MZ_IOPORTE_TRISCLR (PIC32MZ_IOPORTE_K1BASE+PIC32MZ_IOPORT_TRISCLR_OFFSET)
|
||||
# define PIC32MZ_IOPORTE_TRISSET (PIC32MZ_IOPORTE_K1BASE+PIC32MZ_IOPORT_TRISSET_OFFSET)
|
||||
# define PIC32MZ_IOPORTE_TRISINV (PIC32MZ_IOPORTE_K1BASE+PIC32MZ_IOPORT_TRISINV_OFFSET)
|
||||
|
||||
# define PIC32MZ_IOPORTE_PORT (PIC32MZ_IOPORTE_K1BASE+PIC32MZ_IOPORT_PORT_OFFSET)
|
||||
# define PIC32MZ_IOPORTE_PORTCLR (PIC32MZ_IOPORTE_K1BASE+PIC32MZ_IOPORT_PORTCLR_OFFSET)
|
||||
# define PIC32MZ_IOPORTE_PORTSET (PIC32MZ_IOPORTE_K1BASE+PIC32MZ_IOPORT_PORTSET_OFFSET)
|
||||
# define PIC32MZ_IOPORTE_PORTINV (PIC32MZ_IOPORTE_K1BASE+PIC32MZ_IOPORT_PORTINV_OFFSET)
|
||||
|
||||
# define PIC32MZ_IOPORTE_LAT (PIC32MZ_IOPORTE_K1BASE+PIC32MZ_IOPORT_LAT_OFFSET)
|
||||
# define PIC32MZ_IOPORTE_LATCLR (PIC32MZ_IOPORTE_K1BASE+PIC32MZ_IOPORT_LATCLR_OFFSET)
|
||||
# define PIC32MZ_IOPORTE_LATSET (PIC32MZ_IOPORTE_K1BASE+PIC32MZ_IOPORT_LATSET_OFFSET)
|
||||
# define PIC32MZ_IOPORTE_LATINV (PIC32MZ_IOPORTE_K1BASE+PIC32MZ_IOPORT_LATINV_OFFSET)
|
||||
|
||||
# define PIC32MZ_IOPORTE_ODC (PIC32MZ_IOPORTE_K1BASE+PIC32MZ_IOPORT_ODC_OFFSET)
|
||||
# define PIC32MZ_IOPORTE_ODCCLR (PIC32MZ_IOPORTE_K1BASE+PIC32MZ_IOPORT_ODCCLR_OFFSET)
|
||||
# define PIC32MZ_IOPORTE_ODCSET (PIC32MZ_IOPORTE_K1BASE+PIC32MZ_IOPORT_ODCSET_OFFSET)
|
||||
# define PIC32MZ_IOPORTE_ODCINV (PIC32MZ_IOPORTE_K1BASE+PIC32MZ_IOPORT_ODCINV_OFFSET)
|
||||
|
||||
# define PIC32MZ_IOPORTE_CNPU (PIC32MZ_IOPORTE_K1BASE+PIC32MZ_IOPORT_CNPU_OFFSET)
|
||||
# define PIC32MZ_IOPORTE_CNPUCLR (PIC32MZ_IOPORTE_K1BASE+PIC32MZ_IOPORT_CNPUCLR_OFFSET)
|
||||
# define PIC32MZ_IOPORTE_CNPUSET (PIC32MZ_IOPORTE_K1BASE+PIC32MZ_IOPORT_CNPUSET_OFFSET)
|
||||
# define PIC32MZ_IOPORTE_CNPUINV (PIC32MZ_IOPORTE_K1BASE+PIC32MZ_IOPORT_CNPUINV_OFFSET)
|
||||
|
||||
# define PIC32MZ_IOPORTE_CNPD (PIC32MZ_IOPORTE_K1BASE+PIC32MZ_IOPORT_CNPD_OFFSET)
|
||||
# define PIC32MZ_IOPORTE_CNPDCLR (PIC32MZ_IOPORTE_K1BASE+PIC32MZ_IOPORT_CNPDCLR_OFFSET)
|
||||
# define PIC32MZ_IOPORTE_CNPDSET (PIC32MZ_IOPORTE_K1BASE+PIC32MZ_IOPORT_CNPDSET_OFFSET)
|
||||
# define PIC32MZ_IOPORTE_CNPDINV (PIC32MZ_IOPORTE_K1BASE+PIC32MZ_IOPORT_CNPDINV_OFFSET)
|
||||
|
||||
# define PIC32MZ_IOPORTE_CNCON (PIC32MZ_IOPORTE_K1BASE+PIC32MZ_IOPORT_CNCON_OFFSET)
|
||||
# define PIC32MZ_IOPORTE_CNCONCLR (PIC32MZ_IOPORTE_K1BASE+PIC32MZ_IOPORT_CNCONCLR_OFFSET)
|
||||
# define PIC32MZ_IOPORTE_CNCONSET (PIC32MZ_IOPORTE_K1BASE+PIC32MZ_IOPORT_CNCONSET_OFFSET)
|
||||
# define PIC32MZ_IOPORTE_CNCONINV (PIC32MZ_IOPORTE_K1BASE+PIC32MZ_IOPORT_CNCONINV_OFFSET)
|
||||
|
||||
# define PIC32MZ_IOPORTE_CNEN (PIC32MZ_IOPORTE_K1BASE+PIC32MZ_IOPORT_CNEN_OFFSET)
|
||||
# define PIC32MZ_IOPORTE_CNENCLR (PIC32MZ_IOPORTE_K1BASE+PIC32MZ_IOPORT_CNENCLR_OFFSET)
|
||||
# define PIC32MZ_IOPORTE_CNENSET (PIC32MZ_IOPORTE_K1BASE+PIC32MZ_IOPORT_CNENSET_OFFSET)
|
||||
# define PIC32MZ_IOPORTE_CNENINV (PIC32MZ_IOPORTE_K1BASE+PIC32MZ_IOPORT_CNENINV_OFFSET)
|
||||
|
||||
# define PIC32MZ_IOPORTE_CNSTAT (PIC32MZ_IOPORTE_K1BASE+PIC32MZ_IOPORT_CNSTAT_OFFSET)
|
||||
# define PIC32MZ_IOPORTE_CNSTATCLR (PIC32MZ_IOPORTE_K1BASE+PIC32MZ_IOPORT_CNSTATCLR_OFFSET)
|
||||
# define PIC32MZ_IOPORTE_CNSTATSET (PIC32MZ_IOPORTE_K1BASE+PIC32MZ_IOPORT_CNSTATSET_OFFSET)
|
||||
# define PIC32MZ_IOPORTE_CNSTATINV (PIC32MZ_IOPORTE_K1BASE+PIC32MZ_IOPORT_CNSTATINV_OFFSET)
|
||||
#endif
|
||||
|
||||
#if CHIP_NPORTS > 4
|
||||
/* Port F addresses */
|
||||
|
||||
# define PIC32MZ_IOPORTE_ANSEL (PIC32MZ_IOPORTE_K1BASE+PIC32MZ_IOPORT_ANSEL_OFFSET)
|
||||
# define PIC32MZ_IOPORTE_ANSELCLR (PIC32MZ_IOPORTE_K1BASE+PIC32MZ_IOPORT_ANSELCLR_OFFSET)
|
||||
# define PIC32MZ_IOPORTE_ANSELSET (PIC32MZ_IOPORTE_K1BASE+PIC32MZ_IOPORT_ANSELSET_OFFSET)
|
||||
# define PIC32MZ_IOPORTE_ANSELINV (PIC32MZ_IOPORTE_K1BASE+PIC32MZ_IOPORT_ANSELINV_OFFSET)
|
||||
|
||||
# define PIC32MZ_IOPORTE_TRIS (PIC32MZ_IOPORTE_K1BASE+PIC32MZ_IOPORT_TRIS_OFFSET)
|
||||
# define PIC32MZ_IOPORTE_TRISCLR (PIC32MZ_IOPORTE_K1BASE+PIC32MZ_IOPORT_TRISCLR_OFFSET)
|
||||
# define PIC32MZ_IOPORTE_TRISSET (PIC32MZ_IOPORTE_K1BASE+PIC32MZ_IOPORT_TRISSET_OFFSET)
|
||||
# define PIC32MZ_IOPORTE_TRISINV (PIC32MZ_IOPORTE_K1BASE+PIC32MZ_IOPORT_TRISINV_OFFSET)
|
||||
|
||||
# define PIC32MZ_IOPORTE_PORT (PIC32MZ_IOPORTE_K1BASE+PIC32MZ_IOPORT_PORT_OFFSET)
|
||||
# define PIC32MZ_IOPORTE_PORTCLR (PIC32MZ_IOPORTE_K1BASE+PIC32MZ_IOPORT_PORTCLR_OFFSET)
|
||||
# define PIC32MZ_IOPORTE_PORTSET (PIC32MZ_IOPORTE_K1BASE+PIC32MZ_IOPORT_PORTSET_OFFSET)
|
||||
# define PIC32MZ_IOPORTE_PORTINV (PIC32MZ_IOPORTE_K1BASE+PIC32MZ_IOPORT_PORTINV_OFFSET)
|
||||
|
||||
# define PIC32MZ_IOPORTE_LAT (PIC32MZ_IOPORTE_K1BASE+PIC32MZ_IOPORT_LAT_OFFSET)
|
||||
# define PIC32MZ_IOPORTE_LATCLR (PIC32MZ_IOPORTE_K1BASE+PIC32MZ_IOPORT_LATCLR_OFFSET)
|
||||
# define PIC32MZ_IOPORTE_LATSET (PIC32MZ_IOPORTE_K1BASE+PIC32MZ_IOPORT_LATSET_OFFSET)
|
||||
# define PIC32MZ_IOPORTE_LATINV (PIC32MZ_IOPORTE_K1BASE+PIC32MZ_IOPORT_LATINV_OFFSET)
|
||||
|
||||
# define PIC32MZ_IOPORTE_ODC (PIC32MZ_IOPORTE_K1BASE+PIC32MZ_IOPORT_ODC_OFFSET)
|
||||
# define PIC32MZ_IOPORTE_ODCCLR (PIC32MZ_IOPORTE_K1BASE+PIC32MZ_IOPORT_ODCCLR_OFFSET)
|
||||
# define PIC32MZ_IOPORTE_ODCSET (PIC32MZ_IOPORTE_K1BASE+PIC32MZ_IOPORT_ODCSET_OFFSET)
|
||||
# define PIC32MZ_IOPORTE_ODCINV (PIC32MZ_IOPORTE_K1BASE+PIC32MZ_IOPORT_ODCINV_OFFSET)
|
||||
|
||||
# define PIC32MZ_IOPORTE_CNPU (PIC32MZ_IOPORTE_K1BASE+PIC32MZ_IOPORT_CNPU_OFFSET)
|
||||
# define PIC32MZ_IOPORTE_CNPUCLR (PIC32MZ_IOPORTE_K1BASE+PIC32MZ_IOPORT_CNPUCLR_OFFSET)
|
||||
# define PIC32MZ_IOPORTE_CNPUSET (PIC32MZ_IOPORTE_K1BASE+PIC32MZ_IOPORT_CNPUSET_OFFSET)
|
||||
# define PIC32MZ_IOPORTE_CNPUINV (PIC32MZ_IOPORTE_K1BASE+PIC32MZ_IOPORT_CNPUINV_OFFSET)
|
||||
|
||||
# define PIC32MZ_IOPORTE_CNPD (PIC32MZ_IOPORTE_K1BASE+PIC32MZ_IOPORT_CNPD_OFFSET)
|
||||
# define PIC32MZ_IOPORTE_CNPDCLR (PIC32MZ_IOPORTE_K1BASE+PIC32MZ_IOPORT_CNPDCLR_OFFSET)
|
||||
# define PIC32MZ_IOPORTE_CNPDSET (PIC32MZ_IOPORTE_K1BASE+PIC32MZ_IOPORT_CNPDSET_OFFSET)
|
||||
# define PIC32MZ_IOPORTE_CNPDINV (PIC32MZ_IOPORTE_K1BASE+PIC32MZ_IOPORT_CNPDINV_OFFSET)
|
||||
|
||||
# define PIC32MZ_IOPORTE_CNCON (PIC32MZ_IOPORTE_K1BASE+PIC32MZ_IOPORT_CNCON_OFFSET)
|
||||
# define PIC32MZ_IOPORTE_CNCONCLR (PIC32MZ_IOPORTE_K1BASE+PIC32MZ_IOPORT_CNCONCLR_OFFSET)
|
||||
# define PIC32MZ_IOPORTE_CNCONSET (PIC32MZ_IOPORTE_K1BASE+PIC32MZ_IOPORT_CNCONSET_OFFSET)
|
||||
# define PIC32MZ_IOPORTE_CNCONINV (PIC32MZ_IOPORTE_K1BASE+PIC32MZ_IOPORT_CNCONINV_OFFSET)
|
||||
|
||||
# define PIC32MZ_IOPORTE_CNEN (PIC32MZ_IOPORTE_K1BASE+PIC32MZ_IOPORT_CNEN_OFFSET)
|
||||
# define PIC32MZ_IOPORTE_CNENCLR (PIC32MZ_IOPORTE_K1BASE+PIC32MZ_IOPORT_CNENCLR_OFFSET)
|
||||
# define PIC32MZ_IOPORTE_CNENSET (PIC32MZ_IOPORTE_K1BASE+PIC32MZ_IOPORT_CNENSET_OFFSET)
|
||||
# define PIC32MZ_IOPORTE_CNENINV (PIC32MZ_IOPORTE_K1BASE+PIC32MZ_IOPORT_CNENINV_OFFSET)
|
||||
|
||||
# define PIC32MZ_IOPORTE_CNSTAT (PIC32MZ_IOPORTE_K1BASE+PIC32MZ_IOPORT_CNSTAT_OFFSET)
|
||||
# define PIC32MZ_IOPORTE_CNSTATCLR (PIC32MZ_IOPORTE_K1BASE+PIC32MZ_IOPORT_CNSTATCLR_OFFSET)
|
||||
# define PIC32MZ_IOPORTE_CNSTATSET (PIC32MZ_IOPORTE_K1BASE+PIC32MZ_IOPORT_CNSTATSET_OFFSET)
|
||||
# define PIC32MZ_IOPORTE_CNSTATINV (PIC32MZ_IOPORTE_K1BASE+PIC32MZ_IOPORT_CNSTATINV_OFFSET)
|
||||
#endif
|
||||
|
||||
#if CHIP_NPORTS > 5
|
||||
/* Port F addresses */
|
||||
|
||||
# define PIC32MZ_IOPORTF_ANSEL (PIC32MZ_IOPORTF_K1BASE+PIC32MZ_IOPORT_ANSEL_OFFSET)
|
||||
# define PIC32MZ_IOPORTF_ANSELCLR (PIC32MZ_IOPORTF_K1BASE+PIC32MZ_IOPORT_ANSELCLR_OFFSET)
|
||||
# define PIC32MZ_IOPORTF_ANSELSET (PIC32MZ_IOPORTF_K1BASE+PIC32MZ_IOPORT_ANSELSET_OFFSET)
|
||||
# define PIC32MZ_IOPORTF_ANSELINV (PIC32MZ_IOPORTF_K1BASE+PIC32MZ_IOPORT_ANSELINV_OFFSET)
|
||||
|
||||
# define PIC32MZ_IOPORTF_TRIS (PIC32MZ_IOPORTF_K1BASE+PIC32MZ_IOPORT_TRIS_OFFSET)
|
||||
# define PIC32MZ_IOPORTF_TRISCLR (PIC32MZ_IOPORTF_K1BASE+PIC32MZ_IOPORT_TRISCLR_OFFSET)
|
||||
# define PIC32MZ_IOPORTF_TRISSET (PIC32MZ_IOPORTF_K1BASE+PIC32MZ_IOPORT_TRISSET_OFFSET)
|
||||
# define PIC32MZ_IOPORTF_TRISINV (PIC32MZ_IOPORTF_K1BASE+PIC32MZ_IOPORT_TRISINV_OFFSET)
|
||||
|
||||
# define PIC32MZ_IOPORTF_PORT (PIC32MZ_IOPORTF_K1BASE+PIC32MZ_IOPORT_PORT_OFFSET)
|
||||
# define PIC32MZ_IOPORTF_PORTCLR (PIC32MZ_IOPORTF_K1BASE+PIC32MZ_IOPORT_PORTCLR_OFFSET)
|
||||
# define PIC32MZ_IOPORTF_PORTSET (PIC32MZ_IOPORTF_K1BASE+PIC32MZ_IOPORT_PORTSET_OFFSET)
|
||||
# define PIC32MZ_IOPORTF_PORTINV (PIC32MZ_IOPORTF_K1BASE+PIC32MZ_IOPORT_PORTINV_OFFSET)
|
||||
|
||||
# define PIC32MZ_IOPORTF_LAT (PIC32MZ_IOPORTF_K1BASE+PIC32MZ_IOPORT_LAT_OFFSET)
|
||||
# define PIC32MZ_IOPORTF_LATCLR (PIC32MZ_IOPORTF_K1BASE+PIC32MZ_IOPORT_LATCLR_OFFSET)
|
||||
# define PIC32MZ_IOPORTF_LATSET (PIC32MZ_IOPORTF_K1BASE+PIC32MZ_IOPORT_LATSET_OFFSET)
|
||||
# define PIC32MZ_IOPORTF_LATINV (PIC32MZ_IOPORTF_K1BASE+PIC32MZ_IOPORT_LATINV_OFFSET)
|
||||
|
||||
# define PIC32MZ_IOPORTF_ODC (PIC32MZ_IOPORTF_K1BASE+PIC32MZ_IOPORT_ODC_OFFSET)
|
||||
# define PIC32MZ_IOPORTF_ODCCLR (PIC32MZ_IOPORTF_K1BASE+PIC32MZ_IOPORT_ODCCLR_OFFSET)
|
||||
# define PIC32MZ_IOPORTF_ODCSET (PIC32MZ_IOPORTF_K1BASE+PIC32MZ_IOPORT_ODCSET_OFFSET)
|
||||
# define PIC32MZ_IOPORTF_ODCINV (PIC32MZ_IOPORTF_K1BASE+PIC32MZ_IOPORT_ODCINV_OFFSET)
|
||||
|
||||
# define PIC32MZ_IOPORTF_CNPU (PIC32MZ_IOPORTF_K1BASE+PIC32MZ_IOPORT_CNPU_OFFSET)
|
||||
# define PIC32MZ_IOPORTF_CNPUCLR (PIC32MZ_IOPORTF_K1BASE+PIC32MZ_IOPORT_CNPUCLR_OFFSET)
|
||||
# define PIC32MZ_IOPORTF_CNPUSET (PIC32MZ_IOPORTF_K1BASE+PIC32MZ_IOPORT_CNPUSET_OFFSET)
|
||||
# define PIC32MZ_IOPORTF_CNPUINV (PIC32MZ_IOPORTF_K1BASE+PIC32MZ_IOPORT_CNPUINV_OFFSET)
|
||||
|
||||
# define PIC32MZ_IOPORTF_CNPD (PIC32MZ_IOPORTF_K1BASE+PIC32MZ_IOPORT_CNPD_OFFSET)
|
||||
# define PIC32MZ_IOPORTF_CNPDCLR (PIC32MZ_IOPORTF_K1BASE+PIC32MZ_IOPORT_CNPDCLR_OFFSET)
|
||||
# define PIC32MZ_IOPORTF_CNPDSET (PIC32MZ_IOPORTF_K1BASE+PIC32MZ_IOPORT_CNPDSET_OFFSET)
|
||||
# define PIC32MZ_IOPORTF_CNPDINV (PIC32MZ_IOPORTF_K1BASE+PIC32MZ_IOPORT_CNPDINV_OFFSET)
|
||||
|
||||
# define PIC32MZ_IOPORTF_CNCON (PIC32MZ_IOPORTF_K1BASE+PIC32MZ_IOPORT_CNCON_OFFSET)
|
||||
# define PIC32MZ_IOPORTF_CNCONCLR (PIC32MZ_IOPORTF_K1BASE+PIC32MZ_IOPORT_CNCONCLR_OFFSET)
|
||||
# define PIC32MZ_IOPORTF_CNCONSET (PIC32MZ_IOPORTF_K1BASE+PIC32MZ_IOPORT_CNCONSET_OFFSET)
|
||||
# define PIC32MZ_IOPORTF_CNCONINV (PIC32MZ_IOPORTF_K1BASE+PIC32MZ_IOPORT_CNCONINV_OFFSET)
|
||||
|
||||
# define PIC32MZ_IOPORTF_CNEN (PIC32MZ_IOPORTF_K1BASE+PIC32MZ_IOPORT_CNEN_OFFSET)
|
||||
# define PIC32MZ_IOPORTF_CNENCLR (PIC32MZ_IOPORTF_K1BASE+PIC32MZ_IOPORT_CNENCLR_OFFSET)
|
||||
# define PIC32MZ_IOPORTF_CNENSET (PIC32MZ_IOPORTF_K1BASE+PIC32MZ_IOPORT_CNENSET_OFFSET)
|
||||
# define PIC32MZ_IOPORTF_CNENINV (PIC32MZ_IOPORTF_K1BASE+PIC32MZ_IOPORT_CNENINV_OFFSET)
|
||||
|
||||
# define PIC32MZ_IOPORTF_CNSTAT (PIC32MZ_IOPORTF_K1BASE+PIC32MZ_IOPORT_CNSTAT_OFFSET)
|
||||
# define PIC32MZ_IOPORTF_CNSTATCLR (PIC32MZ_IOPORTF_K1BASE+PIC32MZ_IOPORT_CNSTATCLR_OFFSET)
|
||||
# define PIC32MZ_IOPORTF_CNSTATSET (PIC32MZ_IOPORTF_K1BASE+PIC32MZ_IOPORT_CNSTATSET_OFFSET)
|
||||
# define PIC32MZ_IOPORTF_CNSTATINV (PIC32MZ_IOPORTF_K1BASE+PIC32MZ_IOPORT_CNSTATINV_OFFSET)
|
||||
#endif
|
||||
|
||||
#if CHIP_NPORTS > 6
|
||||
/* Port G addresses */
|
||||
|
||||
# define PIC32MZ_IOPORTG_ANSEL (PIC32MZ_IOPORTG_K1BASE+PIC32MZ_IOPORT_ANSEL_OFFSET)
|
||||
# define PIC32MZ_IOPORTG_ANSELCLR (PIC32MZ_IOPORTG_K1BASE+PIC32MZ_IOPORT_ANSELCLR_OFFSET)
|
||||
# define PIC32MZ_IOPORTG_ANSELSET (PIC32MZ_IOPORTG_K1BASE+PIC32MZ_IOPORT_ANSELSET_OFFSET)
|
||||
# define PIC32MZ_IOPORTG_ANSELINV (PIC32MZ_IOPORTG_K1BASE+PIC32MZ_IOPORT_ANSELINV_OFFSET)
|
||||
|
||||
# define PIC32MZ_IOPORTG_TRIS (PIC32MZ_IOPORTG_K1BASE+PIC32MZ_IOPORT_TRIS_OFFSET)
|
||||
# define PIC32MZ_IOPORTG_TRISCLR (PIC32MZ_IOPORTG_K1BASE+PIC32MZ_IOPORT_TRISCLR_OFFSET)
|
||||
# define PIC32MZ_IOPORTG_TRISSET (PIC32MZ_IOPORTG_K1BASE+PIC32MZ_IOPORT_TRISSET_OFFSET)
|
||||
# define PIC32MZ_IOPORTG_TRISINV (PIC32MZ_IOPORTG_K1BASE+PIC32MZ_IOPORT_TRISINV_OFFSET)
|
||||
|
||||
# define PIC32MZ_IOPORTG_PORT (PIC32MZ_IOPORTG_K1BASE+PIC32MZ_IOPORT_PORT_OFFSET)
|
||||
# define PIC32MZ_IOPORTG_PORTCLR (PIC32MZ_IOPORTG_K1BASE+PIC32MZ_IOPORT_PORTCLR_OFFSET)
|
||||
# define PIC32MZ_IOPORTG_PORTSET (PIC32MZ_IOPORTG_K1BASE+PIC32MZ_IOPORT_PORTSET_OFFSET)
|
||||
# define PIC32MZ_IOPORTG_PORTINV (PIC32MZ_IOPORTG_K1BASE+PIC32MZ_IOPORT_PORTINV_OFFSET)
|
||||
|
||||
# define PIC32MZ_IOPORTG_LAT (PIC32MZ_IOPORTG_K1BASE+PIC32MZ_IOPORT_LAT_OFFSET)
|
||||
# define PIC32MZ_IOPORTG_LATCLR (PIC32MZ_IOPORTG_K1BASE+PIC32MZ_IOPORT_LATCLR_OFFSET)
|
||||
# define PIC32MZ_IOPORTG_LATSET (PIC32MZ_IOPORTG_K1BASE+PIC32MZ_IOPORT_LATSET_OFFSET)
|
||||
# define PIC32MZ_IOPORTG_LATINV (PIC32MZ_IOPORTG_K1BASE+PIC32MZ_IOPORT_LATINV_OFFSET)
|
||||
|
||||
# define PIC32MZ_IOPORTG_ODC (PIC32MZ_IOPORTG_K1BASE+PIC32MZ_IOPORT_ODC_OFFSET)
|
||||
# define PIC32MZ_IOPORTG_ODCCLR (PIC32MZ_IOPORTG_K1BASE+PIC32MZ_IOPORT_ODCCLR_OFFSET)
|
||||
# define PIC32MZ_IOPORTG_ODCSET (PIC32MZ_IOPORTG_K1BASE+PIC32MZ_IOPORT_ODCSET_OFFSET)
|
||||
# define PIC32MZ_IOPORTG_ODCINV (PIC32MZ_IOPORTG_K1BASE+PIC32MZ_IOPORT_ODCINV_OFFSET)
|
||||
|
||||
# define PIC32MZ_IOPORTG_CNPU (PIC32MZ_IOPORTG_K1BASE+PIC32MZ_IOPORT_CNPU_OFFSET)
|
||||
# define PIC32MZ_IOPORTG_CNPUCLR (PIC32MZ_IOPORTG_K1BASE+PIC32MZ_IOPORT_CNPUCLR_OFFSET)
|
||||
# define PIC32MZ_IOPORTG_CNPUSET (PIC32MZ_IOPORTG_K1BASE+PIC32MZ_IOPORT_CNPUSET_OFFSET)
|
||||
# define PIC32MZ_IOPORTG_CNPUINV (PIC32MZ_IOPORTG_K1BASE+PIC32MZ_IOPORT_CNPUINV_OFFSET)
|
||||
|
||||
# define PIC32MZ_IOPORTG_CNPD (PIC32MZ_IOPORTG_K1BASE+PIC32MZ_IOPORT_CNPD_OFFSET)
|
||||
# define PIC32MZ_IOPORTG_CNPDCLR (PIC32MZ_IOPORTG_K1BASE+PIC32MZ_IOPORT_CNPDCLR_OFFSET)
|
||||
# define PIC32MZ_IOPORTG_CNPDSET (PIC32MZ_IOPORTG_K1BASE+PIC32MZ_IOPORT_CNPDSET_OFFSET)
|
||||
# define PIC32MZ_IOPORTG_CNPDINV (PIC32MZ_IOPORTG_K1BASE+PIC32MZ_IOPORT_CNPDINV_OFFSET)
|
||||
|
||||
# define PIC32MZ_IOPORTG_CNCON (PIC32MZ_IOPORTG_K1BASE+PIC32MZ_IOPORT_CNCON_OFFSET)
|
||||
# define PIC32MZ_IOPORTG_CNCONCLR (PIC32MZ_IOPORTG_K1BASE+PIC32MZ_IOPORT_CNCONCLR_OFFSET)
|
||||
# define PIC32MZ_IOPORTG_CNCONSET (PIC32MZ_IOPORTG_K1BASE+PIC32MZ_IOPORT_CNCONSET_OFFSET)
|
||||
# define PIC32MZ_IOPORTG_CNCONINV (PIC32MZ_IOPORTG_K1BASE+PIC32MZ_IOPORT_CNCONINV_OFFSET)
|
||||
|
||||
# define PIC32MZ_IOPORTG_CNEN (PIC32MZ_IOPORTG_K1BASE+PIC32MZ_IOPORT_CNEN_OFFSET)
|
||||
# define PIC32MZ_IOPORTG_CNENCLR (PIC32MZ_IOPORTG_K1BASE+PIC32MZ_IOPORT_CNENCLR_OFFSET)
|
||||
# define PIC32MZ_IOPORTG_CNENSET (PIC32MZ_IOPORTG_K1BASE+PIC32MZ_IOPORT_CNENSET_OFFSET)
|
||||
# define PIC32MZ_IOPORTG_CNENINV (PIC32MZ_IOPORTG_K1BASE+PIC32MZ_IOPORT_CNENINV_OFFSET)
|
||||
|
||||
# define PIC32MZ_IOPORTG_CNSTAT (PIC32MZ_IOPORTG_K1BASE+PIC32MZ_IOPORT_CNSTAT_OFFSET)
|
||||
# define PIC32MZ_IOPORTG_CNSTATCLR (PIC32MZ_IOPORTG_K1BASE+PIC32MZ_IOPORT_CNSTATCLR_OFFSET)
|
||||
# define PIC32MZ_IOPORTG_CNSTATSET (PIC32MZ_IOPORTG_K1BASE+PIC32MZ_IOPORT_CNSTATSET_OFFSET)
|
||||
# define PIC32MZ_IOPORTG_CNSTATINV (PIC32MZ_IOPORTG_K1BASE+PIC32MZ_IOPORT_CNSTATINV_OFFSET)
|
||||
#endif
|
||||
|
||||
#if CHIP_NPORTS > 7
|
||||
/* Port H addresses */
|
||||
|
||||
# define PIC32MZ_IOPORTH_ANSEL (PIC32MZ_IOPORTH_K1BASE+PIC32MZ_IOPORT_ANSEL_OFFSET)
|
||||
# define PIC32MZ_IOPORTH_ANSELCLR (PIC32MZ_IOPORTH_K1BASE+PIC32MZ_IOPORT_ANSELCLR_OFFSET)
|
||||
# define PIC32MZ_IOPORTH_ANSELSET (PIC32MZ_IOPORTH_K1BASE+PIC32MZ_IOPORT_ANSELSET_OFFSET)
|
||||
# define PIC32MZ_IOPORTH_ANSELINV (PIC32MZ_IOPORTH_K1BASE+PIC32MZ_IOPORT_ANSELINV_OFFSET)
|
||||
|
||||
# define PIC32MZ_IOPORTH_TRIS (PIC32MZ_IOPORTH_K1BASE+PIC32MZ_IOPORT_TRIS_OFFSET)
|
||||
# define PIC32MZ_IOPORTH_TRISCLR (PIC32MZ_IOPORTH_K1BASE+PIC32MZ_IOPORT_TRISCLR_OFFSET)
|
||||
# define PIC32MZ_IOPORTH_TRISSET (PIC32MZ_IOPORTH_K1BASE+PIC32MZ_IOPORT_TRISSET_OFFSET)
|
||||
# define PIC32MZ_IOPORTH_TRISINV (PIC32MZ_IOPORTH_K1BASE+PIC32MZ_IOPORT_TRISINV_OFFSET)
|
||||
|
||||
# define PIC32MZ_IOPORTH_PORT (PIC32MZ_IOPORTH_K1BASE+PIC32MZ_IOPORT_PORT_OFFSET)
|
||||
# define PIC32MZ_IOPORTH_PORTCLR (PIC32MZ_IOPORTH_K1BASE+PIC32MZ_IOPORT_PORTCLR_OFFSET)
|
||||
# define PIC32MZ_IOPORTH_PORTSET (PIC32MZ_IOPORTH_K1BASE+PIC32MZ_IOPORT_PORTSET_OFFSET)
|
||||
# define PIC32MZ_IOPORTH_PORTINV (PIC32MZ_IOPORTH_K1BASE+PIC32MZ_IOPORT_PORTINV_OFFSET)
|
||||
|
||||
# define PIC32MZ_IOPORTH_LAT (PIC32MZ_IOPORTH_K1BASE+PIC32MZ_IOPORT_LAT_OFFSET)
|
||||
# define PIC32MZ_IOPORTH_LATCLR (PIC32MZ_IOPORTH_K1BASE+PIC32MZ_IOPORT_LATCLR_OFFSET)
|
||||
# define PIC32MZ_IOPORTH_LATSET (PIC32MZ_IOPORTH_K1BASE+PIC32MZ_IOPORT_LATSET_OFFSET)
|
||||
# define PIC32MZ_IOPORTH_LATINV (PIC32MZ_IOPORTH_K1BASE+PIC32MZ_IOPORT_LATINV_OFFSET)
|
||||
|
||||
# define PIC32MZ_IOPORTH_ODC (PIC32MZ_IOPORTH_K1BASE+PIC32MZ_IOPORT_ODC_OFFSET)
|
||||
# define PIC32MZ_IOPORTH_ODCCLR (PIC32MZ_IOPORTH_K1BASE+PIC32MZ_IOPORT_ODCCLR_OFFSET)
|
||||
# define PIC32MZ_IOPORTH_ODCSET (PIC32MZ_IOPORTH_K1BASE+PIC32MZ_IOPORT_ODCSET_OFFSET)
|
||||
# define PIC32MZ_IOPORTH_ODCINV (PIC32MZ_IOPORTH_K1BASE+PIC32MZ_IOPORT_ODCINV_OFFSET)
|
||||
|
||||
# define PIC32MZ_IOPORTH_CNPU (PIC32MZ_IOPORTH_K1BASE+PIC32MZ_IOPORT_CNPU_OFFSET)
|
||||
# define PIC32MZ_IOPORTH_CNPUCLR (PIC32MZ_IOPORTH_K1BASE+PIC32MZ_IOPORT_CNPUCLR_OFFSET)
|
||||
# define PIC32MZ_IOPORTH_CNPUSET (PIC32MZ_IOPORTH_K1BASE+PIC32MZ_IOPORT_CNPUSET_OFFSET)
|
||||
# define PIC32MZ_IOPORTH_CNPUINV (PIC32MZ_IOPORTH_K1BASE+PIC32MZ_IOPORT_CNPUINV_OFFSET)
|
||||
|
||||
# define PIC32MZ_IOPORTH_CNPD (PIC32MZ_IOPORTH_K1BASE+PIC32MZ_IOPORT_CNPD_OFFSET)
|
||||
# define PIC32MZ_IOPORTH_CNPDCLR (PIC32MZ_IOPORTH_K1BASE+PIC32MZ_IOPORT_CNPDCLR_OFFSET)
|
||||
# define PIC32MZ_IOPORTH_CNPDSET (PIC32MZ_IOPORTH_K1BASE+PIC32MZ_IOPORT_CNPDSET_OFFSET)
|
||||
# define PIC32MZ_IOPORTH_CNPDINV (PIC32MZ_IOPORTH_K1BASE+PIC32MZ_IOPORT_CNPDINV_OFFSET)
|
||||
|
||||
# define PIC32MZ_IOPORTH_CNCON (PIC32MZ_IOPORTH_K1BASE+PIC32MZ_IOPORT_CNCON_OFFSET)
|
||||
# define PIC32MZ_IOPORTH_CNCONCLR (PIC32MZ_IOPORTH_K1BASE+PIC32MZ_IOPORT_CNCONCLR_OFFSET)
|
||||
# define PIC32MZ_IOPORTH_CNCONSET (PIC32MZ_IOPORTH_K1BASE+PIC32MZ_IOPORT_CNCONSET_OFFSET)
|
||||
# define PIC32MZ_IOPORTH_CNCONINV (PIC32MZ_IOPORTH_K1BASE+PIC32MZ_IOPORT_CNCONINV_OFFSET)
|
||||
|
||||
# define PIC32MZ_IOPORTH_CNEN (PIC32MZ_IOPORTH_K1BASE+PIC32MZ_IOPORT_CNEN_OFFSET)
|
||||
# define PIC32MZ_IOPORTH_CNENCLR (PIC32MZ_IOPORTH_K1BASE+PIC32MZ_IOPORT_CNENCLR_OFFSET)
|
||||
# define PIC32MZ_IOPORTH_CNENSET (PIC32MZ_IOPORTH_K1BASE+PIC32MZ_IOPORT_CNENSET_OFFSET)
|
||||
# define PIC32MZ_IOPORTH_CNENINV (PIC32MZ_IOPORTH_K1BASE+PIC32MZ_IOPORT_CNENINV_OFFSET)
|
||||
|
||||
# define PIC32MZ_IOPORTH_CNSTAT (PIC32MZ_IOPORTH_K1BASE+PIC32MZ_IOPORT_CNSTAT_OFFSET)
|
||||
# define PIC32MZ_IOPORTH_CNSTATCLR (PIC32MZ_IOPORTH_K1BASE+PIC32MZ_IOPORT_CNSTATCLR_OFFSET)
|
||||
# define PIC32MZ_IOPORTH_CNSTATSET (PIC32MZ_IOPORTH_K1BASE+PIC32MZ_IOPORT_CNSTATSET_OFFSET)
|
||||
# define PIC32MZ_IOPORTH_CNSTATINV (PIC32MZ_IOPORTH_K1BASE+PIC32MZ_IOPORT_CNSTATINV_OFFSET)
|
||||
#endif
|
||||
|
||||
#if CHIP_NPORTS > 8
|
||||
/* Port J addresses */
|
||||
|
||||
# define PIC32MZ_IOPORTJ_ANSEL (PIC32MZ_IOPORTJ_K1BASE+PIC32MZ_IOPORT_ANSEL_OFFSET)
|
||||
# define PIC32MZ_IOPORTJ_ANSELCLR (PIC32MZ_IOPORTJ_K1BASE+PIC32MZ_IOPORT_ANSELCLR_OFFSET)
|
||||
# define PIC32MZ_IOPORTJ_ANSELSET (PIC32MZ_IOPORTJ_K1BASE+PIC32MZ_IOPORT_ANSELSET_OFFSET)
|
||||
# define PIC32MZ_IOPORTJ_ANSELINV (PIC32MZ_IOPORTJ_K1BASE+PIC32MZ_IOPORT_ANSELINV_OFFSET)
|
||||
|
||||
# define PIC32MZ_IOPORTJ_TRIS (PIC32MZ_IOPORTJ_K1BASE+PIC32MZ_IOPORT_TRIS_OFFSET)
|
||||
# define PIC32MZ_IOPORTJ_TRISCLR (PIC32MZ_IOPORTJ_K1BASE+PIC32MZ_IOPORT_TRISCLR_OFFSET)
|
||||
# define PIC32MZ_IOPORTJ_TRISSET (PIC32MZ_IOPORTJ_K1BASE+PIC32MZ_IOPORT_TRISSET_OFFSET)
|
||||
# define PIC32MZ_IOPORTJ_TRISINV (PIC32MZ_IOPORTJ_K1BASE+PIC32MZ_IOPORT_TRISINV_OFFSET)
|
||||
|
||||
# define PIC32MZ_IOPORTJ_PORT (PIC32MZ_IOPORTJ_K1BASE+PIC32MZ_IOPORT_PORT_OFFSET)
|
||||
# define PIC32MZ_IOPORTJ_PORTCLR (PIC32MZ_IOPORTJ_K1BASE+PIC32MZ_IOPORT_PORTCLR_OFFSET)
|
||||
# define PIC32MZ_IOPORTJ_PORTSET (PIC32MZ_IOPORTJ_K1BASE+PIC32MZ_IOPORT_PORTSET_OFFSET)
|
||||
# define PIC32MZ_IOPORTJ_PORTINV (PIC32MZ_IOPORTJ_K1BASE+PIC32MZ_IOPORT_PORTINV_OFFSET)
|
||||
|
||||
# define PIC32MZ_IOPORTJ_LAT (PIC32MZ_IOPORTJ_K1BASE+PIC32MZ_IOPORT_LAT_OFFSET)
|
||||
# define PIC32MZ_IOPORTJ_LATCLR (PIC32MZ_IOPORTJ_K1BASE+PIC32MZ_IOPORT_LATCLR_OFFSET)
|
||||
# define PIC32MZ_IOPORTJ_LATSET (PIC32MZ_IOPORTJ_K1BASE+PIC32MZ_IOPORT_LATSET_OFFSET)
|
||||
# define PIC32MZ_IOPORTJ_LATINV (PIC32MZ_IOPORTJ_K1BASE+PIC32MZ_IOPORT_LATINV_OFFSET)
|
||||
|
||||
# define PIC32MZ_IOPORTJ_ODC (PIC32MZ_IOPORTJ_K1BASE+PIC32MZ_IOPORT_ODC_OFFSET)
|
||||
# define PIC32MZ_IOPORTJ_ODCCLR (PIC32MZ_IOPORTJ_K1BASE+PIC32MZ_IOPORT_ODCCLR_OFFSET)
|
||||
# define PIC32MZ_IOPORTJ_ODCSET (PIC32MZ_IOPORTJ_K1BASE+PIC32MZ_IOPORT_ODCSET_OFFSET)
|
||||
# define PIC32MZ_IOPORTJ_ODCINV (PIC32MZ_IOPORTJ_K1BASE+PIC32MZ_IOPORT_ODCINV_OFFSET)
|
||||
|
||||
# define PIC32MZ_IOPORTJ_CNPU (PIC32MZ_IOPORTJ_K1BASE+PIC32MZ_IOPORT_CNPU_OFFSET)
|
||||
# define PIC32MZ_IOPORTJ_CNPUCLR (PIC32MZ_IOPORTJ_K1BASE+PIC32MZ_IOPORT_CNPUCLR_OFFSET)
|
||||
# define PIC32MZ_IOPORTJ_CNPUSET (PIC32MZ_IOPORTJ_K1BASE+PIC32MZ_IOPORT_CNPUSET_OFFSET)
|
||||
# define PIC32MZ_IOPORTJ_CNPUINV (PIC32MZ_IOPORTJ_K1BASE+PIC32MZ_IOPORT_CNPUINV_OFFSET)
|
||||
|
||||
# define PIC32MZ_IOPORTJ_CNPD (PIC32MZ_IOPORTJ_K1BASE+PIC32MZ_IOPORT_CNPD_OFFSET)
|
||||
# define PIC32MZ_IOPORTJ_CNPDCLR (PIC32MZ_IOPORTJ_K1BASE+PIC32MZ_IOPORT_CNPDCLR_OFFSET)
|
||||
# define PIC32MZ_IOPORTJ_CNPDSET (PIC32MZ_IOPORTJ_K1BASE+PIC32MZ_IOPORT_CNPDSET_OFFSET)
|
||||
# define PIC32MZ_IOPORTJ_CNPDINV (PIC32MZ_IOPORTJ_K1BASE+PIC32MZ_IOPORT_CNPDINV_OFFSET)
|
||||
|
||||
# define PIC32MZ_IOPORTJ_CNCON (PIC32MZ_IOPORTJ_K1BASE+PIC32MZ_IOPORT_CNCON_OFFSET)
|
||||
# define PIC32MZ_IOPORTJ_CNCONCLR (PIC32MZ_IOPORTJ_K1BASE+PIC32MZ_IOPORT_CNCONCLR_OFFSET)
|
||||
# define PIC32MZ_IOPORTJ_CNCONSET (PIC32MZ_IOPORTJ_K1BASE+PIC32MZ_IOPORT_CNCONSET_OFFSET)
|
||||
# define PIC32MZ_IOPORTJ_CNCONINV (PIC32MZ_IOPORTJ_K1BASE+PIC32MZ_IOPORT_CNCONINV_OFFSET)
|
||||
|
||||
# define PIC32MZ_IOPORTJ_CNEN (PIC32MZ_IOPORTJ_K1BASE+PIC32MZ_IOPORT_CNEN_OFFSET)
|
||||
# define PIC32MZ_IOPORTJ_CNENCLR (PIC32MZ_IOPORTJ_K1BASE+PIC32MZ_IOPORT_CNENCLR_OFFSET)
|
||||
# define PIC32MZ_IOPORTJ_CNENSET (PIC32MZ_IOPORTJ_K1BASE+PIC32MZ_IOPORT_CNENSET_OFFSET)
|
||||
# define PIC32MZ_IOPORTJ_CNENINV (PIC32MZ_IOPORTJ_K1BASE+PIC32MZ_IOPORT_CNENINV_OFFSET)
|
||||
|
||||
# define PIC32MZ_IOPORTJ_CNSTAT (PIC32MZ_IOPORTJ_K1BASE+PIC32MZ_IOPORT_CNSTAT_OFFSET)
|
||||
# define PIC32MZ_IOPORTJ_CNSTATCLR (PIC32MZ_IOPORTJ_K1BASE+PIC32MZ_IOPORT_CNSTATCLR_OFFSET)
|
||||
# define PIC32MZ_IOPORTJ_CNSTATSET (PIC32MZ_IOPORTJ_K1BASE+PIC32MZ_IOPORT_CNSTATSET_OFFSET)
|
||||
# define PIC32MZ_IOPORTJ_CNSTATINV (PIC32MZ_IOPORTJ_K1BASE+PIC32MZ_IOPORT_CNSTATINV_OFFSET)
|
||||
#endif
|
||||
|
||||
#if CHIP_NPORTS > 9
|
||||
/* Port K addresses */
|
||||
|
||||
# define PIC32MZ_IOPORTK_ANSEL (PIC32MZ_IOPORTK_K1BASE+PIC32MZ_IOPORT_ANSEL_OFFSET)
|
||||
# define PIC32MZ_IOPORTK_ANSELCLR (PIC32MZ_IOPORTK_K1BASE+PIC32MZ_IOPORT_ANSELCLR_OFFSET)
|
||||
# define PIC32MZ_IOPORTK_ANSELSET (PIC32MZ_IOPORTK_K1BASE+PIC32MZ_IOPORT_ANSELSET_OFFSET)
|
||||
# define PIC32MZ_IOPORTK_ANSELINV (PIC32MZ_IOPORTK_K1BASE+PIC32MZ_IOPORT_ANSELINV_OFFSET)
|
||||
|
||||
# define PIC32MZ_IOPORTK_TRIS (PIC32MZ_IOPORTK_K1BASE+PIC32MZ_IOPORT_TRIS_OFFSET)
|
||||
# define PIC32MZ_IOPORTK_TRISCLR (PIC32MZ_IOPORTK_K1BASE+PIC32MZ_IOPORT_TRISCLR_OFFSET)
|
||||
# define PIC32MZ_IOPORTK_TRISSET (PIC32MZ_IOPORTK_K1BASE+PIC32MZ_IOPORT_TRISSET_OFFSET)
|
||||
# define PIC32MZ_IOPORTK_TRISINV (PIC32MZ_IOPORTK_K1BASE+PIC32MZ_IOPORT_TRISINV_OFFSET)
|
||||
|
||||
# define PIC32MZ_IOPORTK_PORT (PIC32MZ_IOPORTK_K1BASE+PIC32MZ_IOPORT_PORT_OFFSET)
|
||||
# define PIC32MZ_IOPORTK_PORTCLR (PIC32MZ_IOPORTK_K1BASE+PIC32MZ_IOPORT_PORTCLR_OFFSET)
|
||||
# define PIC32MZ_IOPORTK_PORTSET (PIC32MZ_IOPORTK_K1BASE+PIC32MZ_IOPORT_PORTSET_OFFSET)
|
||||
# define PIC32MZ_IOPORTK_PORTINV (PIC32MZ_IOPORTK_K1BASE+PIC32MZ_IOPORT_PORTINV_OFFSET)
|
||||
|
||||
# define PIC32MZ_IOPORTK_LAT (PIC32MZ_IOPORTK_K1BASE+PIC32MZ_IOPORT_LAT_OFFSET)
|
||||
# define PIC32MZ_IOPORTK_LATCLR (PIC32MZ_IOPORTK_K1BASE+PIC32MZ_IOPORT_LATCLR_OFFSET)
|
||||
# define PIC32MZ_IOPORTK_LATSET (PIC32MZ_IOPORTK_K1BASE+PIC32MZ_IOPORT_LATSET_OFFSET)
|
||||
# define PIC32MZ_IOPORTK_LATINV (PIC32MZ_IOPORTK_K1BASE+PIC32MZ_IOPORT_LATINV_OFFSET)
|
||||
|
||||
# define PIC32MZ_IOPORTK_ODC (PIC32MZ_IOPORTK_K1BASE+PIC32MZ_IOPORT_ODC_OFFSET)
|
||||
# define PIC32MZ_IOPORTK_ODCCLR (PIC32MZ_IOPORTK_K1BASE+PIC32MZ_IOPORT_ODCCLR_OFFSET)
|
||||
# define PIC32MZ_IOPORTK_ODCSET (PIC32MZ_IOPORTK_K1BASE+PIC32MZ_IOPORT_ODCSET_OFFSET)
|
||||
# define PIC32MZ_IOPORTK_ODCINV (PIC32MZ_IOPORTK_K1BASE+PIC32MZ_IOPORT_ODCINV_OFFSET)
|
||||
|
||||
# define PIC32MZ_IOPORTK_CNPU (PIC32MZ_IOPORTK_K1BASE+PIC32MZ_IOPORT_CNPU_OFFSET)
|
||||
# define PIC32MZ_IOPORTK_CNPUCLR (PIC32MZ_IOPORTK_K1BASE+PIC32MZ_IOPORT_CNPUCLR_OFFSET)
|
||||
# define PIC32MZ_IOPORTK_CNPUSET (PIC32MZ_IOPORTK_K1BASE+PIC32MZ_IOPORT_CNPUSET_OFFSET)
|
||||
# define PIC32MZ_IOPORTK_CNPUINV (PIC32MZ_IOPORTK_K1BASE+PIC32MZ_IOPORT_CNPUINV_OFFSET)
|
||||
|
||||
# define PIC32MZ_IOPORTK_CNPD (PIC32MZ_IOPORTK_K1BASE+PIC32MZ_IOPORT_CNPD_OFFSET)
|
||||
# define PIC32MZ_IOPORTK_CNPDCLR (PIC32MZ_IOPORTK_K1BASE+PIC32MZ_IOPORT_CNPDCLR_OFFSET)
|
||||
# define PIC32MZ_IOPORTK_CNPDSET (PIC32MZ_IOPORTK_K1BASE+PIC32MZ_IOPORT_CNPDSET_OFFSET)
|
||||
# define PIC32MZ_IOPORTK_CNPDINV (PIC32MZ_IOPORTK_K1BASE+PIC32MZ_IOPORT_CNPDINV_OFFSET)
|
||||
|
||||
# define PIC32MZ_IOPORTK_CNCON (PIC32MZ_IOPORTK_K1BASE+PIC32MZ_IOPORT_CNCON_OFFSET)
|
||||
# define PIC32MZ_IOPORTK_CNCONCLR (PIC32MZ_IOPORTK_K1BASE+PIC32MZ_IOPORT_CNCONCLR_OFFSET)
|
||||
# define PIC32MZ_IOPORTK_CNCONSET (PIC32MZ_IOPORTK_K1BASE+PIC32MZ_IOPORT_CNCONSET_OFFSET)
|
||||
# define PIC32MZ_IOPORTK_CNCONINV (PIC32MZ_IOPORTK_K1BASE+PIC32MZ_IOPORT_CNCONINV_OFFSET)
|
||||
|
||||
# define PIC32MZ_IOPORTK_CNEN (PIC32MZ_IOPORTK_K1BASE+PIC32MZ_IOPORT_CNEN_OFFSET)
|
||||
# define PIC32MZ_IOPORTK_CNENCLR (PIC32MZ_IOPORTK_K1BASE+PIC32MZ_IOPORT_CNENCLR_OFFSET)
|
||||
# define PIC32MZ_IOPORTK_CNENSET (PIC32MZ_IOPORTK_K1BASE+PIC32MZ_IOPORT_CNENSET_OFFSET)
|
||||
# define PIC32MZ_IOPORTK_CNENINV (PIC32MZ_IOPORTK_K1BASE+PIC32MZ_IOPORT_CNENINV_OFFSET)
|
||||
|
||||
# define PIC32MZ_IOPORTK_CNSTAT (PIC32MZ_IOPORTK_K1BASE+PIC32MZ_IOPORT_CNSTAT_OFFSET)
|
||||
# define PIC32MZ_IOPORTK_CNSTATCLR (PIC32MZ_IOPORTK_K1BASE+PIC32MZ_IOPORT_CNSTATCLR_OFFSET)
|
||||
# define PIC32MZ_IOPORTK_CNSTATSET (PIC32MZ_IOPORTK_K1BASE+PIC32MZ_IOPORT_CNSTATSET_OFFSET)
|
||||
# define PIC32MZ_IOPORTK_CNSTATINV (PIC32MZ_IOPORTK_K1BASE+PIC32MZ_IOPORT_CNSTATINV_OFFSET)
|
||||
#endif
|
||||
|
||||
/* Register Bit-Field Definitions ***********************************************************/
|
||||
|
||||
/* Analog select register */
|
||||
|
||||
#define IOPORT_ANSEL(n) (1 << (n)) /* Bits 0-15: Analog select */
|
||||
|
||||
/* Tri-state register */
|
||||
|
||||
#define IOPORT_TRIS(n) (1 << (n)) /* Bits 0-15: 1: Input 0: Output */
|
||||
|
||||
/* Port register */
|
||||
|
||||
#define IOPORT_PORT(n) (1 << (n)) /* Bits 0-15: Pin value */
|
||||
|
||||
/* Port data latch register */
|
||||
|
||||
#define IOPORT_LAT(n) (1 << (n)) /* Bits 0-15: Port latch value */
|
||||
|
||||
/* Open drain control register */
|
||||
|
||||
#define IOPORT_ODC(n) (1 << (n)) /* Bits 0-15: 1: OD output enabled, 0: Disabled */
|
||||
|
||||
/* Change Notice Pull-up register */
|
||||
|
||||
#define IOPORT_CNPU(n) (1 << (n)) /* Bits 0:15: 1=Pull-up enabled */
|
||||
|
||||
/* Change Notice Pull-down register */
|
||||
|
||||
#define IOPORT_CNPD(n) (1 << (n)) /* Bits 0:15: 1=Pull-down enabled */
|
||||
|
||||
/* Change Notice Control register */
|
||||
|
||||
#define IOPORT_CNCON_SIDL (1 << 13) /* Bit 13: Stop in idle mode */
|
||||
#define IOPORT_CNCON_ON (1 << 15) /* Bit 15: Change notice module enable */
|
||||
|
||||
/* Change Notice Interrupt Enable register */
|
||||
|
||||
#define IOPORT_CNEN(n) (1 << (n)) /* Bits 0-15: 1=Interrupt enabled */
|
||||
|
||||
/* Change Notice Control register */
|
||||
|
||||
#define IOPORT_CNSTAT(n) (1 << (n) /* Bits 0-15: Change notice control pin n */
|
||||
|
||||
/********************************************************************************************
|
||||
* Public Types
|
||||
********************************************************************************************/
|
||||
|
||||
#ifndef __ASSEMBLY__
|
||||
|
||||
/********************************************************************************************
|
||||
* Public Data
|
||||
********************************************************************************************/
|
||||
|
||||
#ifdef __cplusplus
|
||||
#define EXTERN extern "C"
|
||||
extern "C"
|
||||
{
|
||||
#else
|
||||
#define EXTERN extern
|
||||
#endif
|
||||
|
||||
/********************************************************************************************
|
||||
* Public Function Prototypes
|
||||
********************************************************************************************/
|
||||
|
||||
#undef EXTERN
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* __ASSEMBLY__ */
|
||||
#endif /* CHIP_NPORTS > 0 */
|
||||
#endif /* __ARCH_MIPS_SRC_PIC32MZ_CHIP_PIC32MZ_IOPORT_H */
|
||||
|
|
@ -128,7 +128,7 @@
|
|||
#define PIC32MZ_OC_K1BASE (PIC32MZ_SFR_K1BASE + 0x00044000) /* OC1-OC9 */
|
||||
#define PIC32MZ_ADC1_K1BASE (PIC32MZ_SFR_K1BASE + 0x0004b000) /* ADC1 */
|
||||
#define PIC32MZ_CMP_K1BASE (PIC32MZ_SFR_K1BASE + 0x0004c000) /* Comparator 1, 2 */
|
||||
#define PIC32MZ_PORT_K1BASE (PIC32MZ_SFR_K1BASE + 0x00060000) /* PORTA-PORTK */
|
||||
#define PIC32MZ_IOPORT_K1BASE (PIC32MZ_SFR_K1BASE + 0x00060000) /* PORTA-PORTK */
|
||||
#define PIC32MZ_CAN_K1BASE (PIC32MZ_SFR_K1BASE + 0x00080000) /* CAN1 and CAN2 */
|
||||
#define PIC32MZ_ETH_K1BASE (PIC32MZ_SFR_K1BASE + 0x00082000) /* Ethernet */
|
||||
#define PIC32MZ_PREFETCH_K1BASE (PIC32MZ_SFR_K1BASE + 0x000e0000) /* Prefetch */
|
||||
|
|
|
|||
|
|
@ -0,0 +1,344 @@
|
|||
/****************************************************************************
|
||||
* arch/mips/src/pic32mz/pic32mz-gpio.c
|
||||
*
|
||||
* Copyright (C) 2015 Gregory Nutt. All rights reserved.
|
||||
* Author: Gregory Nutt <gnutt@nuttx.org>
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions
|
||||
* are met:
|
||||
*
|
||||
* 1. Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* 2. Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in
|
||||
* the documentation and/or other materials provided with the
|
||||
* distribution.
|
||||
* 3. Neither the name NuttX nor the names of its contributors may be
|
||||
* used to endorse or promote products derived from this software
|
||||
* without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
|
||||
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
|
||||
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
|
||||
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
|
||||
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
|
||||
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
|
||||
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
|
||||
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
|
||||
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
|
||||
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
|
||||
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||
* POSSIBILITY OF SUCH DAMAGE.
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
/****************************************************************************
|
||||
* Included Files
|
||||
****************************************************************************/
|
||||
|
||||
#include <nuttx/config.h>
|
||||
|
||||
#include <stdint.h>
|
||||
#include <assert.h>
|
||||
#include <errno.h>
|
||||
|
||||
#include <nuttx/irq.h>
|
||||
#include <nuttx/arch.h>
|
||||
#include <arch/board/board.h>
|
||||
|
||||
#include "up_arch.h"
|
||||
|
||||
#include "chip/pic32mz-ioport.h"
|
||||
#include "pic32mz-gpio.h"
|
||||
|
||||
#if CHIP_NPORTS > 0
|
||||
|
||||
/****************************************************************************
|
||||
* Pre-processor Definitions
|
||||
****************************************************************************/
|
||||
|
||||
/****************************************************************************
|
||||
* Public Data
|
||||
****************************************************************************/
|
||||
|
||||
/****************************************************************************
|
||||
* Private Data
|
||||
****************************************************************************/
|
||||
|
||||
static const uintptr_t g_gpiobase[CHIP_NPORTS] =
|
||||
{
|
||||
PIC32MZ_IOPORTA_K1BASE
|
||||
#if CHIP_NPORTS > 1
|
||||
, PIC32MZ_IOPORTB_K1BASE
|
||||
#endif
|
||||
#if CHIP_NPORTS > 2
|
||||
, PIC32MZ_IOPORTC_K1BASE
|
||||
#endif
|
||||
#if CHIP_NPORTS > 3
|
||||
, PIC32MZ_IOPORTD_K1BASE
|
||||
#endif
|
||||
#if CHIP_NPORTS > 4
|
||||
, PIC32MZ_IOPORTE_K1BASE
|
||||
#endif
|
||||
#if CHIP_NPORTS > 5
|
||||
, PIC32MZ_IOPORTF_K1BASE
|
||||
#endif
|
||||
#if CHIP_NPORTS > 6
|
||||
, PIC32MZ_IOPORTG_K1BASE
|
||||
#endif
|
||||
#if CHIP_NPORTS > 7
|
||||
, PIC32MZ_IOPORTH_K1BASE
|
||||
#endif
|
||||
#if CHIP_NPORTS > 8
|
||||
, PIC32MZ_IOPORTJ_K1BASE
|
||||
#endif
|
||||
#if CHIP_NPORTS > 9
|
||||
, PIC32MZ_IOPORTK_K1BASE
|
||||
#endif
|
||||
};
|
||||
|
||||
/****************************************************************************
|
||||
* Private Functions
|
||||
****************************************************************************/
|
||||
|
||||
/****************************************************************************
|
||||
* Name: Inline PIN set field extractors
|
||||
****************************************************************************/
|
||||
|
||||
static inline bool pic32mz_output(uint16_t pinset)
|
||||
{
|
||||
return ((pinset & GPIO_OUTPUT) != 0);
|
||||
}
|
||||
|
||||
static inline bool pic32mz_opendrain(uint16_t pinset)
|
||||
{
|
||||
return ((pinset & GPIO_MODE_MASK) == GPIO_OPENDRAN);
|
||||
}
|
||||
|
||||
static inline bool pic32mz_outputhigh(uint16_t pinset)
|
||||
{
|
||||
return ((pinset & GPIO_VALUE_MASK) != 0);
|
||||
}
|
||||
|
||||
static inline bool pic32mz_value(uint16_t pinset)
|
||||
{
|
||||
return ((pinset & GPIO_VALUE_MASK) != GPIO_VALUE_ZERO);
|
||||
}
|
||||
|
||||
static inline unsigned int pic32mz_portno(uint16_t pinset)
|
||||
{
|
||||
return ((pinset & GPIO_PORT_MASK) >> GPIO_PORT_SHIFT);
|
||||
}
|
||||
|
||||
static inline unsigned int pic32mz_pinno(uint16_t pinset)
|
||||
{
|
||||
return ((pinset & GPIO_PIN_MASK) >> GPIO_PIN_SHIFT);
|
||||
}
|
||||
|
||||
static inline unsigned int pic32mz_analog(uint16_t pinset)
|
||||
{
|
||||
return ((pinset & GPIO_ANALOG_MASK) != 0);
|
||||
}
|
||||
|
||||
/****************************************************************************
|
||||
* Public Functions
|
||||
****************************************************************************/
|
||||
|
||||
/****************************************************************************
|
||||
* Name: pic32mz_configgpio
|
||||
*
|
||||
* Description:
|
||||
* Configure a GPIO pin based on bit-encoded description of the pin (the
|
||||
* interrupt will be configured when pic32mz_attach() is called.
|
||||
*
|
||||
* Returned Value:
|
||||
* OK on success; negated errno on failure.
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
int pic32mz_configgpio(uint16_t cfgset)
|
||||
{
|
||||
unsigned int port = pic32mz_portno(cfgset);
|
||||
unsigned int pin = pic32mz_pinno(cfgset);
|
||||
uint32_t mask = (1 << pin);
|
||||
uintptr_t base;
|
||||
|
||||
/* Verify that the port number is within range */
|
||||
|
||||
if (port < CHIP_NPORTS)
|
||||
{
|
||||
/* Get the base address of the ports */
|
||||
|
||||
base = g_gpiobase[port];
|
||||
|
||||
/* Is this an input or an output? */
|
||||
|
||||
sched_lock();
|
||||
if (pic32mz_output(cfgset))
|
||||
{
|
||||
/* Not analog */
|
||||
|
||||
putreg32(mask, base + PIC32MZ_IOPORT_ANSELCLR_OFFSET);
|
||||
|
||||
/* It is an output; clear the corresponding bit in the TRIS register */
|
||||
|
||||
putreg32(mask, base + PIC32MZ_IOPORT_TRISCLR_OFFSET);
|
||||
|
||||
/* Is it an open drain output? */
|
||||
|
||||
if (pic32mz_opendrain(cfgset))
|
||||
{
|
||||
/* It is an open drain output. Set the corresponding bit in
|
||||
* the ODC register.
|
||||
*/
|
||||
|
||||
putreg32(mask, base + PIC32MZ_IOPORT_ODCSET_OFFSET);
|
||||
}
|
||||
else
|
||||
{
|
||||
/* Is is a normal output. Clear the corresponding bit in the
|
||||
* ODC register.
|
||||
*/
|
||||
|
||||
putreg32(mask, base + PIC32MZ_IOPORT_ODCCLR_OFFSET);
|
||||
}
|
||||
|
||||
/* Set the initial output value */
|
||||
|
||||
pic32mz_gpiowrite(cfgset, pic32mz_outputhigh(cfgset));
|
||||
}
|
||||
else
|
||||
{
|
||||
/* It is an input; set the corresponding bit in the TRIS register. */
|
||||
|
||||
putreg32(mask, base + PIC32MZ_IOPORT_TRISSET_OFFSET);
|
||||
putreg32(mask, base + PIC32MZ_IOPORT_ODCCLR_OFFSET);
|
||||
|
||||
/* Is it an analog input? */
|
||||
|
||||
if (pic32mz_analog(cfgset))
|
||||
{
|
||||
putreg32(mask, base + PIC32MZ_IOPORT_ANSELSET_OFFSET);
|
||||
}
|
||||
else
|
||||
{
|
||||
putreg32(mask, base + PIC32MZ_IOPORT_ANSELCLR_OFFSET);
|
||||
}
|
||||
}
|
||||
|
||||
sched_unlock();
|
||||
return OK;
|
||||
}
|
||||
|
||||
return -EINVAL;
|
||||
}
|
||||
|
||||
/****************************************************************************
|
||||
* Name: pic32mz_gpiowrite
|
||||
*
|
||||
* Description:
|
||||
* Write one or zero to the selected GPIO pin
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
void pic32mz_gpiowrite(uint16_t pinset, bool value)
|
||||
{
|
||||
unsigned int port = pic32mz_portno(pinset);
|
||||
unsigned int pin = pic32mz_pinno(pinset);
|
||||
uintptr_t base;
|
||||
|
||||
/* Verify that the port number is within range */
|
||||
|
||||
if (port < CHIP_NPORTS)
|
||||
{
|
||||
/* Get the base address of the ports */
|
||||
|
||||
base = g_gpiobase[port];
|
||||
|
||||
/* Set or clear the output */
|
||||
|
||||
if (value)
|
||||
{
|
||||
putreg32(1 << pin, base + PIC32MZ_IOPORT_PORTSET_OFFSET);
|
||||
}
|
||||
else
|
||||
{
|
||||
putreg32(1 << pin, base + PIC32MZ_IOPORT_PORTCLR_OFFSET);
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
/****************************************************************************
|
||||
* Name: pic32mz_gpioread
|
||||
*
|
||||
* Description:
|
||||
* Read one or zero from the selected GPIO pin
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
bool pic32mz_gpioread(uint16_t pinset)
|
||||
{
|
||||
unsigned int port = pic32mz_portno(pinset);
|
||||
unsigned int pin = pic32mz_pinno(pinset);
|
||||
uintptr_t base;
|
||||
|
||||
/* Verify that the port number is within range */
|
||||
|
||||
if (port < CHIP_NPORTS)
|
||||
{
|
||||
/* Get the base address of the ports */
|
||||
|
||||
base = g_gpiobase[port];
|
||||
|
||||
/* Get ane return the input value */
|
||||
|
||||
return (getreg32(base + PIC32MZ_IOPORT_PORT_OFFSET) & (1 << pin)) != 0;
|
||||
}
|
||||
|
||||
return false;
|
||||
}
|
||||
|
||||
/****************************************************************************
|
||||
* Function: pic32mz_dumpgpio
|
||||
*
|
||||
* Description:
|
||||
* Dump all GPIO registers associated with the provided base address
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
#if defined(CONFIG_DEBUG) && defined(CONFIG_DEBUG_VERBOSE) && defined(CONFIG_DEBUG_GPIO)
|
||||
void pic32mz_dumpgpio(uint32_t pinset, const char *msg)
|
||||
{
|
||||
unsigned int port = pic32mz_portno(pinset);
|
||||
irqstate_t flags;
|
||||
uintptr_t base;
|
||||
|
||||
/* Verify that the port number is within range */
|
||||
|
||||
if (port < CHIP_NPORTS)
|
||||
{
|
||||
/* Get the base address of the ports */
|
||||
|
||||
base = g_gpiobase[port];
|
||||
|
||||
/* The following requires exclusive access to the GPIO registers */
|
||||
|
||||
sched_lock();
|
||||
lldbg("IOPORT%c pinset: %04x base: %08x -- %s\n",
|
||||
'A'+port, pinset, base, msg);
|
||||
lldbg(" TRIS: %08x PORT: %08x LAT: %08x ODC: %08x\n",
|
||||
getreg32(base + PIC32MZ_IOPORT_TRIS_OFFSET),
|
||||
getreg32(base + PIC32MZ_IOPORT_PORT_OFFSET),
|
||||
getreg32(base + PIC32MZ_IOPORT_LAT_OFFSET),
|
||||
getreg32(base + PIC32MZ_IOPORT_ODC_OFFSET));
|
||||
lldbg(" CNCON: %08x CNEN: %08x CNPUE: %08x\n",
|
||||
getreg32(PIC32MZ_IOPORT_CNCON),
|
||||
getreg32(PIC32MZ_IOPORT_CNEN),
|
||||
getreg32(PIC32MZ_IOPORT_CNPUE));
|
||||
sched_unlock();
|
||||
}
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* CHIP_NPORTS > 0 */
|
||||
Loading…
Reference in New Issue