arch/armv7[a|r]: Support non SGI in up_trigger_irq

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
This commit is contained in:
Xiang Xiao 2022-09-18 18:13:11 +08:00 committed by Masayuki Ishikawa
parent ef43283c67
commit 17ac85eb0a
2 changed files with 30 additions and 2 deletions

View File

@ -523,7 +523,21 @@ int up_prioritize_irq(int irq, int priority)
void up_trigger_irq(int irq, cpu_set_t cpuset) void up_trigger_irq(int irq, cpu_set_t cpuset)
{ {
arm_cpu_sgi(irq, cpuset); if (irq >= 0 && irq <= GIC_IRQ_SGI15)
{
arm_cpu_sgi(irq, cpuset);
}
else if (irq >= 0 && irq < NR_IRQS)
{
uintptr_t regaddr;
/* Write '1' to the corresponding bit in the distributor Interrupt
* Set-Pending (ICDISPR)
*/
regaddr = GIC_ICDISPR(irq);
putreg32(GIC_ICDISPR_INT(irq), regaddr);
}
} }
/**************************************************************************** /****************************************************************************

View File

@ -522,7 +522,21 @@ int up_prioritize_irq(int irq, int priority)
void up_trigger_irq(int irq, cpu_set_t cpuset) void up_trigger_irq(int irq, cpu_set_t cpuset)
{ {
arm_cpu_sgi(irq, cpuset); if (irq >= 0 && irq <= GIC_IRQ_SGI15)
{
arm_cpu_sgi(irq, cpuset);
}
else if (irq >= 0 && irq < NR_IRQS)
{
uintptr_t regaddr;
/* Write '1' to the corresponding bit in the distributor Interrupt
* Set-Pending (ICDISPR)
*/
regaddr = GIC_ICDISPR(irq);
putreg32(GIC_ICDISPR_INT(irq), regaddr);
}
} }
#endif /* CONFIG_ARMV7R_HAVE_GICv2 */ #endif /* CONFIG_ARMV7R_HAVE_GICv2 */