SAMA5: Fix out of range USB PLL divisor
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@ -120,12 +120,14 @@
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*
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* USB Clock = PLLACK / (USBDIV + 1) = 48MHz
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* USBDIV = PLLACK / 48MHz - 1
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* = 16.5
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* REVISIT: USBDIV = 16 gives a clock of 46.59MHz which is an error of 3%
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* = 15.5
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*
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* The maximum value of USBDIV is 15 corresponding to a divisor of 16.
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* REVISIT: USBDIV = 15 gives a clock of 49.5MHz which is an error of 3%
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*/
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# define BOARD_OHCI_INPUT PMC_USB_USBS_PLLA
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# define BOARD_OHCI_DIVIDER (16)
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# define BOARD_OHCI_DIVIDER (15)
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#endif
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#if 0
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