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Fixes illdefined BOARD_FR_DIV with BOARD_FRDIV from MCG 

Original BOARD_FR_DIV was never used - that is a good thing because
  the value ws definec shifted and the code also shifited it.
This commit is contained in:
David Sidrane 2017-02-07 12:16:09 -10:00
parent 0e687121e5
commit 147de588d8
1 changed files with 3 additions and 2 deletions
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5
configs/teensy-3.x/include/board.h
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@ -58,13 +58,14 @@
#undef BOARD_EXTCLOCK /* Crystal */
#define BOARD_EXTAL_LP /* Low Power, as opposed to Hi Gain */
/* BOARD_FR_DIV is MCG_C1_FRDIV_DIV512 from kinetis_mcg.h. According to the k20
/* BOARD_FRDIV is MCG_C1_FRDIV_DIV512 from kinetis_mcg.h. According to the k20
* reference manual, when transitioning MCG clock modes to FLL Bypassed External
* the C1 divider must be set so that the FLL clock is between 31.25 and 39.0625 khz.
* For teensy-3.x that works out to a divider of 512.
*/
#define BOARD_FR_DIV (4 << 3)
#define BOARD_FRDIV MCG_C1_FRDIV_DIV512
#define BOARD_EXTAL_FREQ 16000000 /* 16MHz crystal frequency (REFCLK) */
#define BOARD_XTAL32_FREQ 32768 /* 32KHz RTC Oscillator (not populated) */