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SAMA5: Fix out of range USB PLL divisor

This commit is contained in:
Gregory Nutt 2013-08-14 14:20:01 -06:00
parent 8134ab2d3d
commit 0c1d2ed2b8
1 changed files with 5 additions and 3 deletions
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8
configs/sama5d3x-ek/include/board.h
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@ -120,12 +120,14 @@
*
* USB Clock = PLLACK / (USBDIV + 1) = 48MHz
* USBDIV = PLLACK / 48MHz - 1
* = 16.5
* REVISIT: USBDIV = 16 gives a clock of 46.59MHz which is an error of 3%
* = 15.5
*
* The maximum value of USBDIV is 15 corresponding to a divisor of 16.
* REVISIT: USBDIV = 15 gives a clock of 49.5MHz which is an error of 3%
*/
# define BOARD_OHCI_INPUT PMC_USB_USBS_PLLA
# define BOARD_OHCI_DIVIDER (16)
# define BOARD_OHCI_DIVIDER (15)
#endif
#if 0