diff --git a/arch/misoc/src/lm32/lm32_vectors.S b/arch/misoc/src/lm32/lm32_vectors.S
index aa66237565..80645f834d 100644
--- a/arch/misoc/src/lm32/lm32_vectors.S
+++ b/arch/misoc/src/lm32/lm32_vectors.S
@@ -206,39 +206,39 @@ _do_reset:
 .restore_all_and_eret:
 	/* r1 should have the place where we restore ! */
 
-	lw		r2,  (r1+REG_X2)
-	lw		r3,  (r1+REG_X3)
-	lw		r4,  (r1+REG_X4)
-	lw		r5,  (r1+REG_X5)
-	lw		r6,  (r1+REG_X6)
-	lw		r7,  (r1+REG_X7)
-	lw		r8,  (r1+REG_X8)
-	lw		r9,  (r1+REG_X9)
+	lw		r2, (r1+REG_X2)
+	lw		r3, (r1+REG_X3)
+	lw		r4, (r1+REG_X4)
+	lw		r5, (r1+REG_X5)
+	lw		r6, (r1+REG_X6)
+	lw		r7, (r1+REG_X7)
+	lw		r8, (r1+REG_X8)
+	lw		r9, (r1+REG_X9)
 	lw		r10, (r1+REG_X10)
-	lw		r11,  (r1+REG_X11)
-	lw		r12,  (r1+REG_X12)
-	lw		r13,  (r1+REG_X13)
-	lw		r14,  (r1+REG_X14)
-	lw		r15,  (r1+REG_X15)
-	lw		r16,  (r1+REG_X16)
-	lw		r17,  (r1+REG_X17)
-	lw		r18,  (r1+REG_X18)
-	lw		r19,  (r1+REG_X19)
-	lw		r20,  (r1+REG_X20)
-	lw		r21,  (r1+REG_X21)
-	lw		r22,  (r1+REG_X22)
-	lw		r23,  (r1+REG_X23)
-	lw		r24,  (r1+REG_X24)
-	lw		r25,  (r1+REG_X25)
-	lw		r26,  (r1+REG_GP)
-	lw		r27,  (r1+REG_FP)
-	lw		r28,  (r1+REG_SP)
-	lw		r29,  (r1+REG_RA)
-	lw		r30,  (r1+REG_EA)
-	lw		r31,  (r1+REG_BA)
+	lw		r11, (r1+REG_X11)
+	lw		r12, (r1+REG_X12)
+	lw		r13, (r1+REG_X13)
+	lw		r14, (r1+REG_X14)
+	lw		r15, (r1+REG_X15)
+	lw		r16, (r1+REG_X16)
+	lw		r17, (r1+REG_X17)
+	lw		r18, (r1+REG_X18)
+	lw		r19, (r1+REG_X19)
+	lw		r20, (r1+REG_X20)
+	lw		r21, (r1+REG_X21)
+	lw		r22, (r1+REG_X22)
+	lw		r23, (r1+REG_X23)
+	lw		r24, (r1+REG_X24)
+	lw		r25, (r1+REG_X25)
+	lw		r26, (r1+REG_GP)
+	lw		r27, (r1+REG_FP)
+	lw		r28, (r1+REG_SP)
+	lw		r29, (r1+REG_RA)
+	lw		r30, (r1+REG_EA)
+	lw		r31, (r1+REG_BA)
 	lw		r1, (r1+REG_INT_CTX)
 	wcsr	IE, r1
-	lw		r1,  (r1+REG_X1)
+	lw		r1, (r1+REG_X1)
 	addi	sp, sp, 136
 	eret