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stm32f7/nucleo-144: add CAN1 pins selection

This commit is contained in:
raiden00pl 2022-10-18 09:43:59 +02:00 committed by Xiang Xiao
parent 56e3053b1a
commit 0954b60df6
2 changed files with 22 additions and 3 deletions
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14
boards/arm/stm32f7/nucleo-144/Kconfig
View File

@ -259,4 +259,18 @@ endchoice # "SPI BUS 3 Clock Mode"
endif # NUCLEO_SPI3_TEST
endif # NUCLEO_SPI_TEST
choice
prompt "CAN1 pins selection"
default NUCLEO_CAN1_MAP_PD0PD1
depends on STM32F7_CAN1
config NUCLEO_144_CAN1_MAP_D14D15
bool "CAN1_TX=D14 CAN1_RX=D15"
config NUCLEO_CAN1_MAP_PD0PD1
bool "CAN1_RX=PD0 CAN1_TX=PD1"
endchoice # CAN1 pins selection
endif # ARCH_BOARD_NUCLEO_144

11
boards/arm/stm32f7/nucleo-144/include/board.h
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@ -505,9 +505,14 @@
#define GPIO_ETH_RMII_TXD0 GPIO_ETH_RMII_TXD0_2
#define GPIO_ETH_RMII_TXD1 GPIO_ETH_RMII_TXD1_1
/* CAN Bus: CAN1 on pin PD0/PD1 */
/* CAN Bus */
#define GPIO_CAN1_TX GPIO_CAN1_TX_3
#define GPIO_CAN1_RX GPIO_CAN1_RX_3
#ifdef CONFIG_NUCLEO_CAN1_MAP_PD0PD1
# define GPIO_CAN1_TX GPIO_CAN1_TX_3 /* PD1 */
# define GPIO_CAN1_RX GPIO_CAN1_RX_3 /* PD0 */
#elif CONFIG_NUCLEO_144_CAN1_MAP_D14D15
# define GPIO_CAN1_TX GPIO_CAN1_TX_2 /* PB9 */
# define GPIO_CAN1_RX GPIO_CAN1_RX_2 /* PB8 */
#endif
#endif /* __BOARDS_ARM_STM32F7_NUCLEO_144_INCLUDE_BOARD_H */