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arm/qemu: The PSCI can be configured with CONFIG_ARM_PSCI 

Signed-off-by: wangming9 <wangming9@xiaomi.com>
Signed-off-by: ligd <liguiding1@xiaomi.com>
This commit is contained in:
wangming9 2024-01-30 11:13:08 +08:00 committed by Xiang Xiao
parent 4818707870
commit 00857c7fd9
6 changed files with 20 additions and 10 deletions
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17
arch/arm/Kconfig
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@ -676,18 +676,20 @@ config ARCH_CHIP_MPS
config ARCH_CHIP_QEMU_ARM
bool "QEMU virt platform (ARMv7a)"
select ARCH_HAVE_PSCI
select ARCH_HAVE_POWEROFF
select ARCH_HAVE_RESET
select ARCH_IDLE_CUSTOM
select ARM_HAVE_PSCI
select ARM_HAVE_NEON
---help---
QEMU virt platform (ARMv7a)
config ARCH_CHIP_GOLDFISH_ARM
bool "GOLDFISH virt platform (ARMv7a)"
select ARCH_HAVE_PSCI
select ARCH_HAVE_POWEROFF
select ARCH_HAVE_RESET
select ARM_HAVE_PSCI
select ARM_HAVE_NEON
---help---
GOLDFISH virt platform (ARMv7a)
@ -1139,8 +1141,8 @@ config ARM_THUMB
bool "Thumb Mode"
default n
config ARCH_HAVE_PSCI
bool "ARM PCSI (Power State Coordination Interface) Support"
config ARM_HAVE_PSCI
bool "ARM PSCI (Power State Coordination Interface) Support"
default n
---help---
This Power State Coordination Interface (PSCI) defines
@ -1188,6 +1190,13 @@ config ARM_HAVE_PACBTI
---help---
Decide whether support PACBTI(Pointer Authentication and Branch Target Identification) Extension
config ARM_PSCI
bool "Enabled PSCI"
depends on ARM_HAVE_PSCI
default n
---help---
See ARM_HAVE_PSCI for details
config ARM_FPU_ABI_SOFT
bool "Soft Float ABI"
default n

2
arch/arm/src/armv7-a/CMakeLists.txt
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@ -112,7 +112,7 @@ if(CONFIG_SMP)
list(APPEND SRCS arm_cpustart.c arm_cpupause.c arm_cpuidlestack.c arm_scu.c)
endif()
if(CONFIG_ARCH_HAVE_PSCI)
if(CONFIG_ARM_PSCI)
list(APPEND SRCS arm_cpu_psci.c arm_smccc.S)
endif()

2
arch/arm/src/armv7-a/Make.defs
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@ -98,7 +98,7 @@ ifeq ($(CONFIG_SMP),y)
CMN_CSRCS += arm_scu.c
endif
ifeq ($(CONFIG_ARCH_HAVE_PSCI),y)
ifeq ($(CONFIG_ARM_PSCI),y)
CMN_ASRCS += arm_smccc.S
CMN_CSRCS += arm_cpu_psci.c
endif

4
arch/arm/src/goldfish/goldfish_boot.c
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@ -60,7 +60,7 @@ void arm_boot(void)
arm_fpuconfig();
#ifdef CONFIG_ARCH_HAVE_PSCI
#ifdef CONFIG_ARM_PSCI
arm_psci_init("smc");
#endif
@ -77,7 +77,7 @@ void arm_boot(void)
#endif
}
#if defined(CONFIG_ARCH_HAVE_PSCI) && defined(CONFIG_SMP)
#if defined(CONFIG_ARM_PSCI) && defined(CONFIG_SMP)
int up_cpu_start(int cpu)
{
#ifdef CONFIG_SCHED_INSTRUMENTATION

4
arch/arm/src/qemu/qemu_boot.c
View File

@ -60,7 +60,7 @@ void arm_boot(void)
arm_fpuconfig();
#ifdef CONFIG_ARCH_HAVE_PSCI
#ifdef CONFIG_ARM_PSCI
arm_psci_init("hvc");
#endif
@ -77,7 +77,7 @@ void arm_boot(void)
#endif
}
#if defined(CONFIG_ARCH_HAVE_PSCI) && defined(CONFIG_SMP)
#if defined(CONFIG_ARM_PSCI) && defined(CONFIG_SMP)
int up_cpu_start(int cpu)
{
#ifdef CONFIG_SCHED_INSTRUMENTATION

1
boards/arm/qemu/qemu-armv7a/configs/smp/defconfig
View File

@ -14,6 +14,7 @@ CONFIG_ARCH_CHIP_QEMU_ARM=y
CONFIG_ARCH_CHIP_QEMU_CORTEXA7=y
CONFIG_ARCH_INTERRUPTSTACK=2048
CONFIG_ARCH_LOWVECTORS=y
CONFIG_ARM_PSCI=y
CONFIG_BUILTIN=y
CONFIG_DEBUG_ASSERTIONS=y
CONFIG_DEBUG_FEATURES=y