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incubator-nuttx/arch/risc-v/include/irq.h

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Add support for the RISC-V architecture and configs/nr5m100-nexys4 board. I will be making the FPGA code for this available soon (within a week I would say). The board support on this is pretty thin, but it seems like maybe a good idea to get the base RISC-V stuff in since there are people interested in it.
2016-10-16 23:47:07 +08:00
/****************************************************************************
* arch/risc-v/include/irq.h
*
* Copyright (C) 2016 Ken Pettit. All rights reserved.
* Author: Ken Pettit <pettitkd@gmail.com>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
****************************************************************************/
arch: Fix included directed -> included directly This typo had been copied and pasted into numerous irq and syscall headers.
2020-04-06 05:00:04 +08:00
/* This file should never be included directly but, rather, only indirectly
Add support for the RISC-V architecture and configs/nr5m100-nexys4 board. I will be making the FPGA code for this available soon (within a week I would say). The board support on this is pretty thin, but it seems like maybe a good idea to get the base RISC-V stuff in since there are people interested in it.
2016-10-16 23:47:07 +08:00
* through nuttx/irq.h
*/
#ifndef __ARCH_RISCV_INCLUDE_IRQ_H
#define __ARCH_RISCV_INCLUDE_IRQ_H
/****************************************************************************
* Included Files
****************************************************************************/
/* Include chip-specific IRQ definitions (including IRQ numbers) */
#include <stdint.h>
#include <nuttx/irq.h>
#include <arch/chip/irq.h>
/* Include RISC-V architecture-specific IRQ definitions */
#if defined(CONFIG_ARCH_RV32IM) || defined(CONFIG_ARCH_RV32I)
# include <arch/rv32im/irq.h>
#endif
Squashed commit of the following: Author: Gregory Nutt <gnutt@nuttx.org> Run all .c and .h modified in PR through nxstyle. Author: Masayuki Ishikawa <masayuki.ishikawa@gmail.com> feature k210 (#16) * arch: risc-v: Add support for __LP64__ to types.h * arch: risc-v: Add support for RV64GC to common files * arch: risc-v: Add support for Kendryte K210 processor (RV64GC) * boards: risk-v: Add support for Sipeed Maix Bit with K210 * tools: Add support for Kendryte K210 processor
2019-12-31 23:06:20 +08:00
#if defined(CONFIG_ARCH_RV64GC)
# include <arch/rv64gc/irq.h>
#endif
arch/risc-v: Remove duplicated declaration for up_irq_save and up_irq_restore Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2020-12-18 02:52:43 +08:00
/****************************************************************************
* Public Types
****************************************************************************/
#ifndef __ASSEMBLY__
/****************************************************************************
* Public Data
****************************************************************************/
#undef EXTERN
#if defined(__cplusplus)
#define EXTERN extern "C"
extern "C"
{
#else
#define EXTERN extern
#endif
/****************************************************************************
* Public Function Prototypes
****************************************************************************/
EXTERN irqstate_t up_irq_save(void);
EXTERN void up_irq_restore(irqstate_t);
EXTERN irqstate_t up_irq_enable(void);
#undef EXTERN
#if defined(__cplusplus)
}
#endif
#endif /* __ASSEMBLY__ */
Add support for the RISC-V architecture and configs/nr5m100-nexys4 board. I will be making the FPGA code for this available soon (within a week I would say). The board support on this is pretty thin, but it seems like maybe a good idea to get the base RISC-V stuff in since there are people interested in it.
2016-10-16 23:47:07 +08:00
#endif /* __ARCH_RISCV_INCLUDE_IRQ_H */