2024-02-18 15:54:41 +08:00
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/****************************************************************************
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* arch/tricore/include/irq.h
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*
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* Licensed to the Apache Software Foundation (ASF) under one or more
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* contributor license agreements. See the NOTICE file distributed with
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* this work for additional information regarding copyright ownership. The
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* ASF licenses this file to you under the Apache License, Version 2.0 (the
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* "License"); you may not use this file except in compliance with the
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* License. You may obtain a copy of the License at
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*
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* http://www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
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* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
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* License for the specific language governing permissions and limitations
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* under the License.
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*
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****************************************************************************/
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/* This file should never be included directly but, rather, only indirectly
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* through nuttx/irq.h
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*/
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#ifndef __ARCH_TRICORE_INCLUDE_IRQ_H
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#define __ARCH_TRICORE_INCLUDE_IRQ_H
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/****************************************************************************
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* Included Files
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****************************************************************************/
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#include <sys/types.h>
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#ifndef __ASSEMBLY__
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# include <stdbool.h>
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#endif
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/* Include NuttX-specific IRQ definitions */
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#include <nuttx/irq.h>
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/* Include chip-specific IRQ definitions (including IRQ numbers) */
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#include <arch/chip/irq.h>
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/****************************************************************************
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* Pre-processor Prototypes
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****************************************************************************/
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#ifndef __ASSEMBLY__
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#ifdef __cplusplus
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#define EXTERN extern "C"
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extern "C"
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{
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#else
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#define EXTERN extern
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#endif
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/****************************************************************************
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* Public Data
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****************************************************************************/
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/* g_current_regs[] holds a references to the current interrupt level
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2024-09-13 10:57:38 +08:00
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* register storage structure. If is non-NULL only during interrupt
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2024-02-18 15:54:41 +08:00
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* processing. Access to g_current_regs[] must be through the macro
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2024-09-13 10:57:38 +08:00
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* g_current_regs for portability.
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2024-02-18 15:54:41 +08:00
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*/
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/* For the case of architectures with multiple CPUs, then there must be one
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* such value for each processor that can receive an interrupt.
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*/
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EXTERN volatile uintptr_t *g_current_regs[CONFIG_SMP_NCPUS];
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/****************************************************************************
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* Public Function Prototypes
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****************************************************************************/
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/****************************************************************************
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* Name: up_cpu_index
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*
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* Description:
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* Return the real core number regardless CONFIG_SMP setting
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2024-02-18 15:54:41 +08:00
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*
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****************************************************************************/
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2024-10-08 12:56:11 +08:00
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#ifdef CONFIG_ARCH_HAVE_MULTICPU
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int up_cpu_index(void) noinstrument_function;
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#endif /* CONFIG_ARCH_HAVE_MULTICPU */
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2024-02-18 15:54:41 +08:00
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/****************************************************************************
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* Name: up_irq_enable
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*
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* Description:
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* Enable interrupts globally.
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*
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****************************************************************************/
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void up_irq_enable(void);
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/****************************************************************************
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* Inline functions
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****************************************************************************/
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noinstrument_function static inline uintptr_t up_getsp(void)
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{
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#ifdef CONFIG_TRICORE_TOOLCHAIN_TASKING
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return (uintptr_t)__get_sp();
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#else
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return __builtin_frame_address(0);
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#endif
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2024-02-18 15:54:41 +08:00
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}
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/****************************************************************************
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* Name: up_irq_save
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*
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* Description:
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* Disable interrupts and return the previous value of the mstatus register
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*
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****************************************************************************/
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noinstrument_function static inline irqstate_t up_irq_save(void)
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{
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return __disable_and_save();
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}
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/****************************************************************************
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* Name: up_irq_restore
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*
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* Description:
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* Restore the value of the mstatus register
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*
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****************************************************************************/
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noinstrument_function static inline void up_irq_restore(irqstate_t flags)
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{
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__restore(flags);
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}
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2024-09-13 10:57:38 +08:00
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/****************************************************************************
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* Inline Functions
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****************************************************************************/
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static inline_function uintptr_t *up_current_regs(void)
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{
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#ifdef CONFIG_SMP
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return (uintptr_t *)g_current_regs[up_cpu_index()];
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#else
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return (uintptr_t *)g_current_regs[0];
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#endif
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2024-09-13 10:57:38 +08:00
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}
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static inline_function void up_set_current_regs(uintptr_t *regs)
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{
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2024-10-08 12:56:11 +08:00
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#ifdef CONFIG_SMP
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2024-09-13 10:57:38 +08:00
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g_current_regs[up_cpu_index()] = regs;
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#else
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g_current_regs[0] = regs;
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#endif
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2024-09-13 10:57:38 +08:00
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}
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2024-02-18 15:54:41 +08:00
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/****************************************************************************
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* Name: up_interrupt_context
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*
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* Description:
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* Return true is we are currently executing in the interrupt
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* handler context.
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*
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****************************************************************************/
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noinstrument_function
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2024-09-13 10:57:38 +08:00
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static inline_function bool up_interrupt_context(void)
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{
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#ifdef CONFIG_SMP
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irqstate_t flags = up_irq_save();
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#endif
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2024-09-13 10:57:38 +08:00
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bool ret = up_current_regs() != NULL;
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2024-02-18 15:54:41 +08:00
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#ifdef CONFIG_SMP
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up_irq_restore(flags);
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#endif
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return ret;
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}
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#endif /* __ASSEMBLY__ */
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#undef EXTERN
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#ifdef __cplusplus
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}
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#endif
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#endif /* __ARCH_TRICORE_INCLUDE_IRQ_H */
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