incubator-nuttx/arch/risc-v/include/fe310/chip.h

/****************************************************************************
 * arch/risc-v/include/fe310/chip.h
 *
 *   Copyright (C) 2019 Masayuki Ishikawa. All rights reserved.
 *   Author: Masayuki Ishikawa <masayuki.ishikawa@gmail.com>
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 *
 * 1. Redistributions of source code must retain the above copyright
 *    notice, this list of conditions and the following disclaimer.
 * 2. Redistributions in binary form must reproduce the above copyright
 *    notice, this list of conditions and the following disclaimer in
 *    the documentation and/or other materials provided with the
 *    distribution.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
 * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
 * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
 * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
 * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
 * POSSIBILITY OF SUCH DAMAGE.
 *
 ****************************************************************************/

#ifndef __ARCH_RISCV_INCLUDE_FE310_CHIP_H
#define __ARCH_RISCV_INCLUDE_FE310_CHIP_H

#endif /* __ARCH_RISCV_INCLUDE_FE310_CHIP_H */
Merged in masayuki2009/nuttx.nuttx/hifive1-qemu (pull request #1078) HiFive1 with qemu * arch: risc-v: Add include/.gitignore * arch: risc-v: Add src/.gitignore * arch: risc-v: Remove uncommon function prototypes in include/irq.h * arch: risc-v: Add missing symbols and function prototypes in src/common/up_internal.h * arch: risc-v: Add src/common/up_modifyreg32.c * arch: risc-v: Enable include Make.dep in src/Makefile * arch: risc-v: Fix stack coloration in common/up_createstack.c * arch: risc-v: Add common/up_puts.c * arch: risc-v: Add common/up_checkstack.c * arch: rv32im: Move all logics from up_dumpstate.c to up_assert.c This change is same as other architectures like arm/src/armv7-m * arch: Select ARCH_HAVE_STACKCHECK for RISC-V in Kconfig * arch: risc-v: Add SiFive fe310 processor NOTE: Currently only tested with qemu * boards: hifive1-revb: Add SiFive hifive1-revb board NOTE: Currently only tested with qemu * tools: Add fe310 processor to configure.sh Approved-by: Alan Carvalho de Assis <acassis@gmail.com> Approved-by: Gregory Nutt <gnutt@nuttx.org> 2019-11-29 04:37:24 +08:00			`/****************************************************************************`
			`* arch/risc-v/include/fe310/chip.h`
			`*`
			`* Copyright (C) 2019 Masayuki Ishikawa. All rights reserved.`
			`* Author: Masayuki Ishikawa <masayuki.ishikawa@gmail.com>`
			`*`
			`* Redistribution and use in source and binary forms, with or without`
			`* modification, are permitted provided that the following conditions`
			`* are met:`
			`*`
			`* 1. Redistributions of source code must retain the above copyright`
			`* notice, this list of conditions and the following disclaimer.`
			`* 2. Redistributions in binary form must reproduce the above copyright`
			`* notice, this list of conditions and the following disclaimer in`
			`* the documentation and/or other materials provided with the`
			`* distribution.`
			`*`
			`* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS`
			`* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT`
			`* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS`
			`* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE`
			`* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,`
			`* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,`
			`* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS`
			`* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED`
			`* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT`
			`* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN`
			`* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE`
			`* POSSIBILITY OF SUCH DAMAGE.`
			`*`
			`****************************************************************************/`

			`#ifndef __ARCH_RISCV_INCLUDE_FE310_CHIP_H`
			`#define __ARCH_RISCV_INCLUDE_FE310_CHIP_H`

			`#endif /* __ARCH_RISCV_INCLUDE_FE310_CHIP_H */`