77 lines
1.8 KiB
Plaintext
77 lines
1.8 KiB
Plaintext
# Low Latency Passthrough with volume Pipeline and PCM
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#
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# Pipeline Endpoints for connection are :-
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#
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# host PCM_P --> SRC --> sink DAI0
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# Include topology builder
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include(`utils.m4')
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include(`src.m4')
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include(`buffer.m4')
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include(`pcm.m4')
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include(`dai.m4')
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include(`pipeline.m4')
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#
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# Components and Buffers
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#
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# Host "Passthrough Capture" PCM uses pipeline DMAC and channel
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# with 4 sink and 0 source periods
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W_PCM_CAPTURE(Passthrough Capture, PIPELINE_DMAC, PIPELINE_DMAC_CHAN, 4, 0, 2)
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#
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# SRC Configuration
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#
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W_VENDORTUPLES(media_src_tokens, sof_src_tokens, LIST(` ', `SOF_TKN_SRC_RATE_OUT "48000"'))
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W_DATA(media_src_conf, media_src_tokens)
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# "SRC" has 4 source and 4 sink periods
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W_SRC(0, PIPELINE_FORMAT, 4, 4, media_src_conf, 2)
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# Capture Buffers
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W_BUFFER(0, COMP_BUFFER_SIZE(4,
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COMP_SAMPLE_SIZE(PIPELINE_FORMAT), PIPELINE_CHANNELS, SCHEDULE_FRAMES),
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PLATFORM_HOST_MEM_CAP)
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W_BUFFER(1, COMP_BUFFER_SIZE(4,
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COMP_SAMPLE_SIZE(PIPELINE_FORMAT), PIPELINE_CHANNELS, SCHEDULE_FRAMES),
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PLATFORM_DAI_MEM_CAP)
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#
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# DAI definitions
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#
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W_DAI_IN(DAI_TYPE, DAI_INDEX, DAI_FORMAT, 0, DAI_PERIODS,
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DAI_PERIODS, dai0c_plat_conf)
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#
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# DAI pipeline
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#
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W_PIPELINE(N_DAI_IN, SCHEDULE_DEADLINE, SCHEDULE_PRIORITY, SCHEDULE_FRAMES,
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SCHEDULE_CORE, 0, pipe_dai_schedule_plat)
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#
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# Pipeline Graph
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#
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# host PCM_P <-- B0 <-- SRC 0 <-- B1 <-- sink DAI0
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P_GRAPH(pipe-pass-src-capture-PIPELINE_ID, PIPELINE_ID,
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LIST(` ',
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`dapm(Passthrough Capture PCM_ID, N_PCMC)',
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`dapm(N_PCMC, N_BUFFER(0))',
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`dapm(N_BUFFER(0), N_SRC(0))',
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`dapm(N_SRC(0), N_BUFFER(1))'))
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#
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# Pipeline Source and Sinks
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#
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indir(`define', concat(`PIPELINE_SINK_', PIPELINE_ID), N_BUFFER(1))
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indir(`define', concat(`PIPELINE_PCM_', PIPELINE_ID), Passthrough Capture PCM_ID)
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#
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# PCM Configuration
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#
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PCM_CAPABILITIES(Passthrough Capture PCM_ID, `S32_LE,S24_LE,S16_LE', 8000, 96000, 2, 4, 2, 16, 192, 16384, 65536, 65536)
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