topology: move ssp related macros to ssp.m4 in platform/common

Signed-off-by: Ranjani Sridharan <ranjani.sridharan@linux.intel.com>
This commit is contained in:
Ranjani Sridharan 2018-06-25 00:04:27 -07:00
parent a835ff2ae9
commit f58a047278
24 changed files with 158 additions and 132 deletions

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@ -22,6 +22,7 @@ AC_OUTPUT([
topology/common/Makefile
topology/platform/Makefile
topology/platform/intel/Makefile
topology/platform/common/Makefile
topology/m4/Makefile
topology/sof/Makefile
topology/test/Makefile

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@ -7,6 +7,7 @@ SUBDIRS = test m4 sof common platform
DEPS = \
platform/intel/*.m4 \
platform/common/*.m4 \
common/*.m4 \
m4/*.m4 \
sof/*.m4
@ -34,7 +35,7 @@ MACHINES = \
.PRECIOUS: %.conf
%.conf : %.m4 ${DEPS}
m4 -I m4 -I common $< > $@
m4 -I m4 -I common -I platform/common $< > $@
%.tplg : %.conf
alsatplg -v 1 -c $< -o $@

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@ -121,47 +121,6 @@ define(`D_DAI', `SectionDAI."'N_DAI`" {'
` capture "'$3`"'
`}')
dnl DAI_CLOCK(clock, freq, codec_master)
define(`DAI_CLOCK',
$1 STR($3)
$1_freq STR($2))
dnl DAI_TDM(slots, width, tx_mask, rx_mask)
define(`DAI_TDM',
`tdm_slots 'STR($1)
` tdm_slot_width 'STR($2)
` tx_slots 'STR($3)
` rx_slots 'STR($4)
)
dnl SSP_CONFIG(format, mclk, bclk, fsync, tdm, ssp_config_data)
define(`SSP_CONFIG',
` format "'$1`"'
` '$2
` '$3
` '$4
` '$5
`}'
$6
)
dnl SSP_CONFIG_DATA(type, idx, valid bits, mclk_id)
dnl mclk_id is optional
define(`SSP_CONFIG_DATA',
`SectionVendorTuples."'N_DAI_CONFIG($1$2)`_tuples" {'
` tokens "sof_ssp_tokens"'
` tuples."word" {'
` SOF_TKN_INTEL_SSP_SAMPLE_BITS' STR($3)
` }'
` tuples."short" {'
` SOF_TKN_INTEL_SSP_MCLK_ID' ifelse($4, `', "0", STR($4))
` }'
`}'
`SectionData."'N_DAI_CONFIG($1$2)`_data" {'
` tuples "'N_DAI_CONFIG($1$2)`_tuples"'
`}'
)
dnl PDM_TUPLES(pdm ctrl id, mic_a_enable, mic_b_enable, polarity_a, polarity_b,
dnl clk_egde, skew)
define(`PDM_TUPLES',

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@ -1 +1 @@
SUBDIRS = intel
SUBDIRS = intel common

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@ -0,0 +1,2 @@
EXTRA_DIST = \
ssp.m4

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@ -0,0 +1,46 @@
divert(-1)
dnl SSP related macros
dnl SSP_CLOCK(clock, freq, codec_master)
define(`SSP_CLOCK',
$1 STR($3)
$1_freq STR($2))
dnl SSP_TDM(slots, width, tx_mask, rx_mask)
define(`SSP_TDM',
`tdm_slots 'STR($1)
` tdm_slot_width 'STR($2)
` tx_slots 'STR($3)
` rx_slots 'STR($4)
)
dnl SSP_CONFIG(format, mclk, bclk, fsync, tdm, ssp_config_data)
define(`SSP_CONFIG',
` format "'$1`"'
` '$2
` '$3
` '$4
` '$5
`}'
$6
)
dnl SSP_CONFIG_DATA(type, idx, valid bits, mclk_id)
dnl mclk_id is optional
define(`SSP_CONFIG_DATA',
`SectionVendorTuples."'N_DAI_CONFIG($1$2)`_tuples" {'
` tokens "sof_ssp_tokens"'
` tuples."word" {'
` SOF_TKN_INTEL_SSP_SAMPLE_BITS' STR($3)
` }'
` tuples."short" {'
` SOF_TKN_INTEL_SSP_MCLK_ID' ifelse($4, `', "0", STR($4))
` }'
`}'
`SectionData."'N_DAI_CONFIG($1$2)`_data" {'
` tuples "'N_DAI_CONFIG($1$2)`_tuples"'
`}'
)
divert(0)dnl

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@ -6,6 +6,7 @@
include(`pipeline.m4')
include(`utils.m4')
include(`dai.m4')
include(`ssp.m4')
# Include TLV library
include(`common/tlv.m4')
@ -91,8 +92,8 @@ PCM_DUPLEX_ADD(Low Latency, 6, 0, 0, PIPELINE_PCM_1, PIPELINE_PCM_2)
# BE configurations - overrides config in ACPI if present
#
DAI_CONFIG(SSP, 2, 0, NoCodec,
SSP_CONFIG(I2S, DAI_CLOCK(mclk, 19200000, codec_mclk_in),
DAI_CLOCK(bclk, 2400000, codec_slave),
DAI_CLOCK(fsync, 48000, codec_slave),
DAI_TDM(2, 25, 3, 3),
SSP_CONFIG(I2S, SSP_CLOCK(mclk, 19200000, codec_mclk_in),
SSP_CLOCK(bclk, 2400000, codec_slave),
SSP_CLOCK(fsync, 48000, codec_slave),
SSP_TDM(2, 25, 3, 3),
SSP_CONFIG_DATA(SSP, 2, 24)))

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@ -6,6 +6,7 @@
include(`utils.m4')
include(`dai.m4')
include(`pipeline.m4')
include(`ssp.m4')
# Include TLV library
include(`common/tlv.m4')
@ -179,45 +180,45 @@ PCM_DUPLEX_ADD(Port5, 5, 5, 5, PIPELINE_PCM_9, PIPELINE_PCM_10)
#
DAI_CONFIG(SSP, 4, 4, SSP4-Codec,
SSP_CONFIG(DSP_B, DAI_CLOCK(mclk, 24576000, codec_mclk_in),
DAI_CLOCK(bclk, 12288000, codec_slave),
DAI_CLOCK(fsync, 48000, codec_slave),
DAI_TDM(8, 32, 15, 15),
SSP_CONFIG(DSP_B, SSP_CLOCK(mclk, 24576000, codec_mclk_in),
SSP_CLOCK(bclk, 12288000, codec_slave),
SSP_CLOCK(fsync, 48000, codec_slave),
SSP_TDM(8, 32, 15, 15),
SSP_CONFIG_DATA(SSP, 4, 32)))
DAI_CONFIG(SSP, 2, 2, SSP2-Codec,
SSP_CONFIG(DSP_B, DAI_CLOCK(mclk, 24576000, codec_mclk_in),
DAI_CLOCK(bclk, 12288000, codec_slave),
DAI_CLOCK(fsync, 48000, codec_slave),
DAI_TDM(2, 32, 255, 255),
SSP_CONFIG(DSP_B, SSP_CLOCK(mclk, 24576000, codec_mclk_in),
SSP_CLOCK(bclk, 12288000, codec_slave),
SSP_CLOCK(fsync, 48000, codec_slave),
SSP_TDM(2, 32, 255, 255),
SSP_CONFIG_DATA(SSP, 2, 32)))
DAI_CONFIG(SSP, 0, 0, SSP0-Codec,
SSP_CONFIG(I2S, DAI_CLOCK(mclk, 24576000, codec_mclk_in),
DAI_CLOCK(bclk, 1536000, codec_slave),
DAI_CLOCK(fsync, 48000, codec_slave),
DAI_TDM(2, 16, 3, 3),
SSP_CONFIG(I2S, SSP_CLOCK(mclk, 24576000, codec_mclk_in),
SSP_CLOCK(bclk, 1536000, codec_slave),
SSP_CLOCK(fsync, 48000, codec_slave),
SSP_TDM(2, 16, 3, 3),
SSP_CONFIG_DATA(SSP, 0, 16)))
DAI_CONFIG(SSP, 1, 1, SSP1-Codec,
SSP_CONFIG(I2S, DAI_CLOCK(mclk, 24576000, codec_mclk_in),
DAI_CLOCK(bclk, 1536000, codec_slave),
DAI_CLOCK(fsync, 48000, codec_slave),
DAI_TDM(2, 16, 3, 3),
SSP_CONFIG(I2S, SSP_CLOCK(mclk, 24576000, codec_mclk_in),
SSP_CLOCK(bclk, 1536000, codec_slave),
SSP_CLOCK(fsync, 48000, codec_slave),
SSP_TDM(2, 16, 3, 3),
SSP_CONFIG_DATA(SSP, 1, 16)))
DAI_CONFIG(SSP, 3, 3, SSP3-Codec,
SSP_CONFIG(I2S, DAI_CLOCK(mclk, 24576000, codec_mclk_in),
DAI_CLOCK(bclk, 1536000, codec_slave),
DAI_CLOCK(fsync, 48000, codec_slave),
DAI_TDM(2, 16, 3, 3),
SSP_CONFIG(I2S, SSP_CLOCK(mclk, 24576000, codec_mclk_in),
SSP_CLOCK(bclk, 1536000, codec_slave),
SSP_CLOCK(fsync, 48000, codec_slave),
SSP_TDM(2, 16, 3, 3),
SSP_CONFIG_DATA(SSP, 3, 16)))
DAI_CONFIG(SSP, 5, 5, SSP5-Codec,
SSP_CONFIG(I2S, DAI_CLOCK(mclk, 24576000, codec_mclk_in),
DAI_CLOCK(bclk, 1536000, codec_slave),
DAI_CLOCK(fsync, 48000, codec_slave),
DAI_TDM(2, 16, 3, 3),
SSP_CONFIG(I2S, SSP_CLOCK(mclk, 24576000, codec_mclk_in),
SSP_CLOCK(bclk, 1536000, codec_slave),
SSP_CLOCK(fsync, 48000, codec_slave),
SSP_TDM(2, 16, 3, 3),
SSP_CONFIG_DATA(SSP, 5, 16)))

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@ -6,6 +6,7 @@
include(`pipeline.m4')
include(`utils.m4')
include(`dai.m4')
include(`ssp.m4')
# Include TLV library
include(`common/tlv.m4')
@ -91,8 +92,8 @@ PCM_DUPLEX_ADD(Low Latency, 6, 0, 0, PIPELINE_PCM_1, PIPELINE_PCM_2)
# BE configurations - overrides config in ACPI if present
#
DAI_CONFIG(SSP, 0, 0, Codec,
SSP_CONFIG(I2S, DAI_CLOCK(mclk, 24000000, codec_mclk_in),
DAI_CLOCK(bclk, 2400000, codec_slave),
DAI_CLOCK(fsync, 48000, codec_slave),
DAI_TDM(2, 25, 3, 3),
SSP_CONFIG(I2S, SSP_CLOCK(mclk, 24000000, codec_mclk_in),
SSP_CLOCK(bclk, 2400000, codec_slave),
SSP_CLOCK(fsync, 48000, codec_slave),
SSP_TDM(2, 25, 3, 3),
SSP_CONFIG_DATA(SSP, 0, 24)))

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@ -6,6 +6,7 @@
include(`utils.m4')
include(`dai.m4')
include(`pipeline.m4')
include(`ssp.m4')
# Include TLV library
include(`common/tlv.m4')
@ -91,8 +92,8 @@ PCM_DUPLEX_ADD(Low Latency, 6, 0, 0, PIPELINE_PCM_1, PIPELINE_PCM_2)
# BE configurations - overrides config in ACPI if present
#
DAI_CONFIG(SSP, 0, 0, Codec,
SSP_CONFIG(I2S, DAI_CLOCK(mclk, 24000000, codec_mclk_in),
DAI_CLOCK(bclk, 2400000, codec_slave),
DAI_CLOCK(fsync, 48000, codec_slave),
DAI_TDM(2, 25, 3, 3),
SSP_CONFIG(I2S, SSP_CLOCK(mclk, 24000000, codec_mclk_in),
SSP_CLOCK(bclk, 2400000, codec_slave),
SSP_CLOCK(fsync, 48000, codec_slave),
SSP_TDM(2, 25, 3, 3),
SSP_CONFIG_DATA(SSP, 0, 24)))

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@ -6,6 +6,7 @@
include(`utils.m4')
include(`dai.m4')
include(`pipeline.m4')
include(`ssp.m4')
# Include TLV library
include(`common/tlv.m4')
@ -91,8 +92,8 @@ PCM_DUPLEX_ADD(Low Latency, 6, 0, 0, PIPELINE_PCM_1, PIPELINE_PCM_2)
# BE configurations - overrides config in ACPI if present
#
DAI_CONFIG(SSP, 2, 0, SSP2-Codec,
SSP_CONFIG(I2S, DAI_CLOCK(mclk, 19200000, codec_mclk_in),
DAI_CLOCK(bclk, 2400000, codec_slave),
DAI_CLOCK(fsync, 48000, codec_slave),
DAI_TDM(2, 25, 3, 3),
SSP_CONFIG(I2S, SSP_CLOCK(mclk, 19200000, codec_mclk_in),
SSP_CLOCK(bclk, 2400000, codec_slave),
SSP_CLOCK(fsync, 48000, codec_slave),
SSP_TDM(2, 25, 3, 3),
SSP_CONFIG_DATA(SSP, 2, 24)))

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@ -6,6 +6,7 @@
include(`pipeline.m4')
include(`utils.m4')
include(`dai.m4')
include(`ssp.m4')
# Include TLV library
include(`common/tlv.m4')
@ -91,8 +92,8 @@ PCM_DUPLEX_ADD(Low Latency, 6, 0, 0, PIPELINE_PCM_1, PIPELINE_PCM_2)
# BE configurations - overrides config in ACPI if present
#
DAI_CONFIG(SSP, 2, 0, NoCodec,
SSP_CONFIG(I2S, DAI_CLOCK(mclk, 19200000, codec_mclk_in),
DAI_CLOCK(bclk, 2400000, codec_slave),
DAI_CLOCK(fsync, 48000, codec_slave),
DAI_TDM(2, 25, 3, 3),
SSP_CONFIG(I2S, SSP_CLOCK(mclk, 19200000, codec_mclk_in),
SSP_CLOCK(bclk, 2400000, codec_slave),
SSP_CLOCK(fsync, 48000, codec_slave),
SSP_TDM(2, 25, 3, 3),
SSP_CONFIG_DATA(SSP, 2, 24)))

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@ -6,6 +6,7 @@
include(`utils.m4')
include(`dai.m4')
include(`pipeline.m4')
include(`ssp.m4')
# Include TLV library
include(`common/tlv.m4')
@ -91,8 +92,8 @@ PCM_DUPLEX_ADD(Low Latency, 6, 0, 0, PIPELINE_PCM_1, PIPELINE_PCM_2)
# BE configurations - overrides config in ACPI if present
#
DAI_CONFIG(SSP, 2, 0, SSP2-Codec,
SSP_CONFIG(I2S, DAI_CLOCK(mclk, 19200000, codec_mclk_in),
DAI_CLOCK(bclk, 2400000, codec_slave),
DAI_CLOCK(fsync, 48000, codec_slave),
DAI_TDM(2, 25, 3, 3),
SSP_CONFIG(I2S, SSP_CLOCK(mclk, 19200000, codec_mclk_in),
SSP_CLOCK(bclk, 2400000, codec_slave),
SSP_CLOCK(fsync, 48000, codec_slave),
SSP_TDM(2, 25, 3, 3),
SSP_CONFIG_DATA(SSP, 2, 24)))

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@ -6,6 +6,7 @@
include(`utils.m4')
include(`dai.m4')
include(`pipeline.m4')
include(`ssp.m4')
# Include TLV library
include(`common/tlv.m4')
@ -91,8 +92,8 @@ PCM_DUPLEX_ADD(Low Latency, 6, 0, 0, PIPELINE_PCM_1, PIPELINE_PCM_2)
# BE configurations - overrides config in ACPI if present
#
DAI_CONFIG(SSP, 2, 0, SSP2-Codec,
SSP_CONFIG(I2S, DAI_CLOCK(mclk, 19200000, codec_mclk_in),
DAI_CLOCK(bclk, 2400000, codec_slave),
DAI_CLOCK(fsync, 48000, codec_slave),
DAI_TDM(2, 25, 3, 3),
SSP_CONFIG(I2S, SSP_CLOCK(mclk, 19200000, codec_mclk_in),
SSP_CLOCK(bclk, 2400000, codec_slave),
SSP_CLOCK(fsync, 48000, codec_slave),
SSP_TDM(2, 25, 3, 3),
SSP_CONFIG_DATA(SSP, 2, 24)))

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@ -6,6 +6,7 @@
include(`utils.m4')
include(`dai.m4')
include(`pipeline.m4')
include(`ssp.m4')
# Include TLV library
include(`common/tlv.m4')
@ -91,8 +92,8 @@ PCM_DUPLEX_ADD(Low Latency, 3, 0, 0, PIPELINE_PCM_1, PIPELINE_PCM_2)
# BE configurations - overrides config in ACPI if present
#
DAI_CONFIG(SSP, 2, 0, SSP2-Codec,
SSP_CONFIG(I2S, DAI_CLOCK(mclk, 19200000, codec_mclk_in),
DAI_CLOCK(bclk, 2400000, codec_slave),
DAI_CLOCK(fsync, 48000, codec_slave),
DAI_TDM(2, 25, 3, 3),
SSP_CONFIG(I2S, SSP_CLOCK(mclk, 19200000, codec_mclk_in),
SSP_CLOCK(bclk, 2400000, codec_slave),
SSP_CLOCK(fsync, 48000, codec_slave),
SSP_TDM(2, 25, 3, 3),
SSP_CONFIG_DATA(SSP, 2, 24)))

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@ -6,6 +6,7 @@
include(`utils.m4')
include(`dai.m4')
include(`pipeline.m4')
include(`ssp.m4')
# Include TLV library
include(`common/tlv.m4')
@ -91,8 +92,8 @@ PCM_DUPLEX_ADD(Low Latency, 6, 0, 0, PIPELINE_PCM_1, PIPELINE_PCM_2)
# BE configurations - overrides config in ACPI if present
#
DAI_CONFIG(SSP, 2, 0, SSP2-Codec,
SSP_CONFIG(I2S, DAI_CLOCK(mclk, 19200000, codec_mclk_in),
DAI_CLOCK(bclk, 1920000, codec_slave),
DAI_CLOCK(fsync, 48000, codec_slave),
DAI_TDM(2, 20, 3, 3),
SSP_CONFIG(I2S, SSP_CLOCK(mclk, 19200000, codec_mclk_in),
SSP_CLOCK(bclk, 1920000, codec_slave),
SSP_CLOCK(fsync, 48000, codec_slave),
SSP_TDM(2, 20, 3, 3),
SSP_CONFIG_DATA(SSP, 2, 16)))

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@ -6,6 +6,7 @@
include(`pipeline.m4')
include(`utils.m4')
include(`dai.m4')
include(`ssp.m4')
# Include TLV library
include(`common/tlv.m4')
@ -91,8 +92,8 @@ PCM_DUPLEX_ADD(Low Latency, 6, 0, 0, PIPELINE_PCM_1, PIPELINE_PCM_2)
# BE configurations - overrides config in ACPI if present
#
DAI_CONFIG(SSP, 2, 0, NoCodec,
SSP_CONFIG(I2S, DAI_CLOCK(mclk, 19200000, codec_mclk_in),
DAI_CLOCK(bclk, 2400000, codec_slave),
DAI_CLOCK(fsync, 48000, codec_slave),
DAI_TDM(2, 25, 3, 3),
SSP_CONFIG(I2S, SSP_CLOCK(mclk, 19200000, codec_mclk_in),
SSP_CLOCK(bclk, 2400000, codec_slave),
SSP_CLOCK(fsync, 48000, codec_slave),
SSP_TDM(2, 25, 3, 3),
SSP_CONFIG_DATA(SSP, 2, 24)))

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@ -6,6 +6,7 @@
include(`utils.m4')
include(`dai.m4')
include(`pipeline.m4')
include(`ssp.m4')
# Include TLV library
include(`common/tlv.m4')
@ -63,10 +64,10 @@ PCM_DUPLEX_ADD(Passthrough, 3, 0, 0, PIPELINE_PCM_1, PIPELINE_PCM_2)
# BE configurations - overrides config in ACPI if present
#
DAI_CONFIG(SSP, 0, 0, SSP0-Codec,
SSP_CONFIG(DSP_B, DAI_CLOCK(mclk, 24000000, codec_mclk_in),
DAI_CLOCK(bclk, 4800000, codec_slave),
DAI_CLOCK(fsync, 48000, codec_slave),
DAI_TDM(4, 25, 3, 3),
SSP_CONFIG(DSP_B, SSP_CLOCK(mclk, 24000000, codec_mclk_in),
SSP_CLOCK(bclk, 4800000, codec_slave),
SSP_CLOCK(fsync, 48000, codec_slave),
SSP_TDM(4, 25, 3, 3),
SSP_CONFIG_DATA(SSP, 0, 24)))
VIRTUAL_DAPM_ROUTE_OUT(codec0_out, SSP, 0, OUT, 0)

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@ -6,6 +6,7 @@
include(`utils.m4')
include(`dai.m4')
include(`pipeline.m4')
include(`ssp.m4')
# Include TLV library
include(`common/tlv.m4')
@ -91,8 +92,8 @@ PCM_DUPLEX_ADD(Low Latency, 6, 0, 0, PIPELINE_PCM_1, PIPELINE_PCM_2)
# BE configurations - overrides config in ACPI if present
#
DAI_CONFIG(SSP, 0, 0, Codec,
SSP_CONFIG(I2S, DAI_CLOCK(mclk, 24000000, codec_mclk_in),
DAI_CLOCK(bclk, 2400000, codec_slave),
DAI_CLOCK(fsync, 48000, codec_slave),
DAI_TDM(2, 25, 3, 3),
SSP_CONFIG(I2S, SSP_CLOCK(mclk, 24000000, codec_mclk_in),
SSP_CLOCK(bclk, 2400000, codec_slave),
SSP_CLOCK(fsync, 48000, codec_slave),
SSP_TDM(2, 25, 3, 3),
SSP_CONFIG_DATA(SSP, 0, 24)))

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@ -4,6 +4,7 @@
# Include topology builder
include(`dai.m4')
include(`ssp.m4')
include(`utils.m4')
include(`pipeline.m4')
@ -86,9 +87,9 @@ PCM_DUPLEX_ADD(Passthrough, 3, 0, 0, PIPELINE_PCM_1, PIPELINE_PCM_2)
#
DAI_CONFIG(TEST_DAI_TYPE, TEST_DAI_PORT, 0, TEST_DAI_LINK_NAME,
SSP_CONFIG(TEST_SSP_MODE,
DAI_CLOCK(mclk, TEST_SSP_MCLK, codec_mclk_in),
DAI_CLOCK(bclk, TEST_SSP_BCLK, codec_slave),
DAI_CLOCK(fsync, 48000, codec_slave),
DAI_TDM(2, TEST_SSP_PHY_BITS, 3, 3),
SSP_CLOCK(mclk, TEST_SSP_MCLK, codec_mclk_in),
SSP_CLOCK(bclk, TEST_SSP_BCLK, codec_slave),
SSP_CLOCK(fsync, 48000, codec_slave),
SSP_TDM(2, TEST_SSP_PHY_BITS, 3, 3),
SSP_CONFIG_DATA(TEST_DAI_TYPE, TEST_DAI_PORT,
TEST_SSP_DATA_BITS)))

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@ -4,6 +4,7 @@
# Include topology builder
include(`dai.m4')
include(`ssp.m4')
include(`utils.m4')
include(`pipeline.m4')
@ -70,10 +71,10 @@ PCM_CAPTURE_ADD(Passthrough, 3, 0, 0, PIPELINE_PCM_2)
DAI_CONFIG(TEST_DAI_TYPE, TEST_DAI_PORT, 0, TEST_DAI_LINK_NAME,
ifelse(TEST_DAI_TYPE, `SSP',
SSP_CONFIG(TEST_SSP_MODE,
DAI_CLOCK(mclk, TEST_SSP_MCLK, codec_mclk_in),
DAI_CLOCK(bclk, TEST_SSP_BCLK, codec_slave),
DAI_CLOCK(fsync, 48000, codec_slave),
DAI_TDM(2, TEST_SSP_PHY_BITS, 3, 3),
SSP_CLOCK(mclk, TEST_SSP_MCLK, codec_mclk_in),
SSP_CLOCK(bclk, TEST_SSP_BCLK, codec_slave),
SSP_CLOCK(fsync, 48000, codec_slave),
SSP_TDM(2, TEST_SSP_PHY_BITS, 3, 3),
SSP_CONFIG_DATA(TEST_DAI_TYPE, TEST_DAI_PORT,
TEST_SSP_DATA_BITS)),
TEST_DAI_TYPE, `DMIC',

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@ -5,6 +5,7 @@
# Include topology builder
include(`pipeline.m4')
include(`dai.m4')
include(`ssp.m4')
include(`utils.m4')
# Include TLV library
@ -69,9 +70,9 @@ PCM_PLAYBACK_ADD(Passthrough, 3, 0, 0, PIPELINE_PCM_1)
#
DAI_CONFIG(TEST_DAI_TYPE, TEST_DAI_PORT, 0, TEST_DAI_LINK_NAME,
SSP_CONFIG(TEST_SSP_MODE,
DAI_CLOCK(mclk, TEST_SSP_MCLK, codec_slave),
DAI_CLOCK(bclk, TEST_SSP_BCLK, codec_slave),
DAI_CLOCK(fsync, 48000, codec_slave),
DAI_TDM(2, TEST_SSP_PHY_BITS, 3, 3),
SSP_CLOCK(mclk, TEST_SSP_MCLK, codec_slave),
SSP_CLOCK(bclk, TEST_SSP_BCLK, codec_slave),
SSP_CLOCK(fsync, 48000, codec_slave),
SSP_TDM(2, TEST_SSP_PHY_BITS, 3, 3),
SSP_CONFIG_DATA(TEST_DAI_TYPE, TEST_DAI_PORT,
TEST_SSP_DATA_BITS)))

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@ -5,6 +5,7 @@
# Include topology builder
include(`pipeline.m4')
include(`dai.m4')
include(`ssp.m4')
include(`utils.m4')
# Include TLV library
@ -58,9 +59,9 @@ DAI_ADD(sof/pipe-dai-playback.m4,
#
DAI_CONFIG(TEST_DAI_TYPE, TEST_DAI_PORT, 0, TEST_DAI_LINK_NAME,
SSP_CONFIG(TEST_SSP_MODE,
DAI_CLOCK(mclk, TEST_SSP_MCLK, codec_mclk_in),
DAI_CLOCK(bclk, TEST_SSP_BCLK, codec_slave),
DAI_CLOCK(fsync, 48000, codec_slave),
DAI_TDM(2, TEST_SSP_PHY_BITS, 3, 3),
SSP_CLOCK(mclk, TEST_SSP_MCLK, codec_mclk_in),
SSP_CLOCK(bclk, TEST_SSP_BCLK, codec_slave),
SSP_CLOCK(fsync, 48000, codec_slave),
SSP_TDM(2, TEST_SSP_PHY_BITS, 3, 3),
SSP_CONFIG_DATA(TEST_DAI_TYPE, TEST_DAI_PORT,
TEST_SSP_DATA_BITS)))

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@ -8,7 +8,7 @@
set -e
# M4 preprocessor flags
export M4PATH="../:../m4:../common:../platform/intel"
export M4PATH="../:../m4:../common:../platform/intel:../platform/common"
# Simple component test cases
# can be used on components with 1 sink and 1 source.