Update sof-cnl-rt274
Update graph to represent actual layout Signed-off-by: Curtis Malainey <cujomalainey@google.com>
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@ -20,9 +20,8 @@ include(`platform/intel/cnl.m4')
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#
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# Define the pipelines
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#
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# PCM0 ----> volume -----> volume ----> SSP0
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# PCM0 <---> volume <---> SSP0
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#
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# PCM1 <---- Volume <---- SSP0
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#
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# Low Latency playback pipeline 1 on PCM 0 using max 2 channels of s24le.
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