From b77473c0b2129082aa6492d5eac25fb8aa2a48b6 Mon Sep 17 00:00:00 2001
From: Wu Zhigang <zhigang.wu@linux.intel.com>
Date: Wed, 21 Mar 2018 18:49:31 +0800
Subject: [PATCH] topology: apl-tdf8532: create m4 file for gpmrb platform

Here add topology file for apollolake GP-MRB platform,
it is initial version, we only support one playback
and one capture PCM pipeline at the moment,
with SSP/DAI set to tdm8-32le-48kHz
(active on first 4 slots for both transmit and receive).

Signed-off-by: Wu Zhigang <zhigang.wu@linux.intel.com>

Reviewed-by: Keyon Jie <yang.jie@linux.intel.com>
---
 topology/Makefile.am         |  6 ++-
 topology/reef-apl-tdf8532.m4 | 71 ++++++++++++++++++++++++++++++++++++
 2 files changed, 75 insertions(+), 2 deletions(-)
 create mode 100644 topology/reef-apl-tdf8532.m4

diff --git a/topology/Makefile.am b/topology/Makefile.am
index f161ba2..a7e86fd 100644
--- a/topology/Makefile.am
+++ b/topology/Makefile.am
@@ -28,7 +28,8 @@ MACHINES = \
 	reef-byt-rt5651.tplg \
 	reef-byt-da7213.tplg \
 	reef-cnl-rt274.tplg \
-	reef-hsw-rt5640.tplg
+	reef-hsw-rt5640.tplg \
+	reef-apl-tdf8532.tplg
 
 # Uncomment the following line if you want to debug conf files
 .PRECIOUS: %.conf
@@ -58,4 +59,5 @@ EXTRA_DIST = \
 	reef-byt-rt5651.m4 \
 	reef-byt-da7213.m4 \
 	reef-cnl-rt274.m4 \
-	reef-hsw-rt5640.m4
+	reef-hsw-rt5640.m4 \
+	reef-apl-tdf8532.m4
diff --git a/topology/reef-apl-tdf8532.m4 b/topology/reef-apl-tdf8532.m4
new file mode 100644
index 0000000..eaddac9
--- /dev/null
+++ b/topology/reef-apl-tdf8532.m4
@@ -0,0 +1,71 @@
+#
+# Topology for generic Apollolake board with TDF8532
+#
+
+# Include topology builder
+include(`utils.m4')
+include(`dai.m4')
+include(`pipeline.m4')
+
+# Include TLV library
+include(`common/tlv.m4')
+
+# Include Token library
+include(`sof/tokens.m4')
+
+# Include Apollolake DSP configuration
+include(`dsps/bxt.m4')
+
+#
+# Define the pipelines
+#
+# PCM0 ----> volume -----> SSP4
+#
+# PCM1 <---- Volume <----- SSP4
+#
+
+# Low Latency playback pipeline 1 on PCM 0 using max 4 channels of s32le.
+# Schedule 48 frames per 1000us deadline on core 0 with priority 0
+# Use DMAC 0 channel 1 for PCM audio playback data
+PIPELINE_PCM_DAI_ADD(sof/pipe-volume-playback.m4,
+	1, 0, 4, s32le,
+	48, 1000, 0, 0, 0, 1, SSP, 4, s32le, 2)
+
+# Low Latency capture pipeline 2 on PCM 0 using max 4 channels of s32le.
+# Schedule 48 frames per 1000us deadline on core 0 with priority 0
+# Use DMAC 0 channel 2 for PCM audio capture data
+PIPELINE_PCM_DAI_ADD(sof/pipe-volume-capture.m4,
+	2, 0, 4, s32le,
+	48, 1000, 0, 0, 0, 1, SSP, 4, s32le, 2)
+
+#
+# DAI configuration
+#
+# SSP port 4 is our only pipeline DAI
+#
+
+# playback DAI is SSP4 using 2 periods
+# Buffers use s32le format, with 48 frame per 1000us on core 0 with priority 0
+DAI_ADD(sof/pipe-dai-playback.m4,
+	1, SSP, 4, SSP4-Codec,
+	PIPELINE_SOURCE_1, 2, s32le,
+	48, 1000, 0, 0)
+
+# capture DAI is SSP4 using 2 periods
+# Buffers use s32le format, with 48 frame per 1000us on core 0 with priority 0
+DAI_ADD(sof/pipe-dai-capture.m4,
+	2, SSP, 4, SSP4-Codec,
+	PIPELINE_SINK_2, 2, s32le,
+	48, 1000, 0, 0)
+
+# PCM Low Latency
+PCM_DUPLEX_ADD(Passthrough, 3, 0, 0, PIPELINE_PCM_1, PIPELINE_PCM_2)
+
+#
+# BE configurations - overrides config in ACPI if present
+#
+DAI_CONFIG(SSP, 4, SSP4-Codec, DSP_B, 32,
+	DAI_CLOCK(mclk, 24576000, slave),
+	DAI_CLOCK(bclk, 12288000, slave),
+	DAI_CLOCK(fsync, 48000, slave),
+	DAI_TDM(8, 32, 15, 15))