2018-06-29 18:05:23 +08:00
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#
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# Topology for generic Apollolake UP^2 with pcm512x codec.
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#
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# Include topology builder
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include(`utils.m4')
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include(`dai.m4')
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include(`pipeline.m4')
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include(`ssp.m4')
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# Include TLV library
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include(`common/tlv.m4')
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# Include Token library
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include(`sof/tokens.m4')
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# Include Apollolake DSP configuration
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include(`platform/intel/bxt.m4')
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#
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# Define the pipelines
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#
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2018-07-06 17:53:06 +08:00
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# PCM0 ----> volume -----> SSP5 (pcm512x)
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2018-06-29 18:05:23 +08:00
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#
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2018-07-14 01:56:08 +08:00
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# Low Latency playback pipeline 1 on PCM 0 using max 2 channels of s32le.
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2018-06-29 18:05:23 +08:00
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# Schedule 48 frames per 1000us deadline on core 0 with priority 0
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2018-07-14 01:56:08 +08:00
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PIPELINE_PCM_ADD(sof/pipe-volume-playback.m4,
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1, 0, 2, s32le,
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48, 1000, 0, 0)
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2018-06-29 18:05:23 +08:00
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#
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# DAIs configuration
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#
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# playback DAI is SSP5 using 2 periods
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2018-07-14 01:56:08 +08:00
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# Buffers use s24le format, with 48 frame per 1000us on core 0 with priority 0
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2018-06-29 18:05:23 +08:00
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DAI_ADD(sof/pipe-dai-playback.m4,
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2018-07-06 17:53:06 +08:00
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1, SSP, 5, SSP5-Codec,
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2018-07-14 01:56:08 +08:00
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PIPELINE_SOURCE_1, 2, s24le,
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2018-07-06 17:53:06 +08:00
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48, 1000, 0, 0)
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2018-06-29 18:05:23 +08:00
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# PCM Low Latency, id 0
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2018-07-30 23:32:40 +08:00
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PCM_PLAYBACK_ADD(Port5, 0, 0, 0, PIPELINE_PCM_1, PIPELINE_PCM_2)
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2018-06-29 18:05:23 +08:00
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#
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# BE configurations - overrides config in ACPI if present
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#
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2018-07-06 17:53:06 +08:00
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DAI_CONFIG(SSP, 5, 0, SSP5-Codec,
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2018-06-29 18:05:23 +08:00
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SSP_CONFIG(I2S, SSP_CLOCK(mclk, 24576000, codec_mclk_in),
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2018-07-14 01:56:08 +08:00
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SSP_CLOCK(bclk, 3072000, codec_slave),
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2018-06-29 18:05:23 +08:00
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SSP_CLOCK(fsync, 48000, codec_slave),
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2018-07-14 01:56:08 +08:00
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SSP_TDM(2, 32, 3, 3),
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SSP_CONFIG_DATA(SSP, 5, 24)))
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