sof/tools/topology/topology2/platform/intel/dmic-generic.conf

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Object.Dai {
DMIC.0 {
name $DMIC0_NAME
id $DMIC0_ID
driver_version $DMIC_DRIVER_VERSION
io_clk $DMIC_IO_CLK
clk_min 500000
clk_max 4800000
unmute_ramp_time_ms 200
# num_pdm_active should always set to 2 but depending on the number of DMIC's
# the mic's are enabled or disabled in each PDM.
num_pdm_active 2
Object.Base.hw_config."DMIC0" {
id 0
}
# PDM controller config
Object.Base.pdm_config."0" {
mic_a_enable $PDM0_MIC_A_ENABLE
mic_b_enable $PDM0_MIC_B_ENABLE
ctrl_id 0
}
Object.Base.pdm_config."1" {
ctrl_id 1
mic_a_enable $PDM1_MIC_A_ENABLE
mic_b_enable $PDM1_MIC_B_ENABLE
}
}
}
Object.Dai {
DMIC.1 {
name $DMIC1_NAME
id $DMIC1_ID
dai_index 1
driver_version $DMIC_DRIVER_VERSION
io_clk $DMIC_IO_CLK
sample_rate 16000
clk_min 500000
clk_max 4800000
unmute_ramp_time_ms 200
# num_pdm_active should always set to 2 but depending on the number of DMIC's
# the mic's are enabled or disabled in each PDM.
num_pdm_active 2
Object.Base.hw_config."DMIC1" {
id 0
}
# PDM controller config
Object.Base.pdm_config."3" {
mic_a_enable $PDM0_MIC_A_ENABLE
mic_b_enable $PDM0_MIC_B_ENABLE
ctrl_id 0
}
Object.Base.pdm_config."4" {
ctrl_id 1
mic_a_enable $PDM1_MIC_A_ENABLE
mic_b_enable $PDM1_MIC_B_ENABLE
}
}
}
Object.Pipeline {
passthrough-capture.100 {
format $FORMAT
index $DMIC0_HOST_PIPELINE_ID
Object.Widget.pipeline.1 {
stream_name $DMIC0_PIPELINE_STREAM_NAME
}
Object.Widget.copier.1 {
stream_name $DMIC0_PCM_CAPS
}
}
passthrough-be.101 {
direction "capture"
format $FORMAT
index $DMIC0_DAI_PIPELINE_ID
Object.Widget.pipeline.1 {
stream_name $DMIC0_PIPELINE_STREAM_NAME
}
Object.Widget.copier.1 {
dai_index 0
type "dai_out"
dai_type "DMIC"
copier_type "DMIC"
type dai_out
stream_name $DMIC0_NAME
node_type $DMIC_LINK_INPUT_CLASS
Object.Base.audio_format.1 {
in_bit_depth 32
in_valid_bit_depth 32
out_bit_depth 32
out_valid_bit_depth 32
dma_buffer_size "$[$ibs * 2]"
}
Object.Base.audio_format.2 {
in_channels 4
in_bit_depth 32
in_valid_bit_depth 32
out_channels 4
out_bit_depth 32
out_valid_bit_depth 32
dma_buffer_size "$[$ibs * 2]"
in_ch_cfg $CHANNEL_CONFIG_3_POINT_1
in_ch_map $CHANNEL_MAP_3_POINT_1
out_ch_cfg $CHANNEL_CONFIG_3_POINT_1
out_ch_map $CHANNEL_MAP_3_POINT_1
}
}
}
}
Object.Base.route.100 {
source $DMIC0_DAI_PIPELINE_SRC
sink $DMIC0_HOST_PIPELINE_SINK
}
Object.PCM {
pcm.10 {
name "DMIC"
id 10
direction "capture"
Object.Base.fe_dai."DMIC" {}
Object.PCM.pcm_caps."capture" {
name $DMIC0_PCM_CAPS
# only 32-bit capture supported now
formats 'S32_LE'
channels_min $NUM_DMICS
channels_max $NUM_DMICS
}
}
}