mirror of https://github.com/thesofproject/sof.git
208 lines
6.0 KiB
Plaintext
208 lines
6.0 KiB
Plaintext
#
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# Topology for Icelake with rt711 + rt1308 (x2) + rt715.
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#
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# Include topology builder
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include(`utils.m4')
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include(`dai.m4')
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include(`pipeline.m4')
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# Include TLV library
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include(`common/tlv.m4')
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# Include Token library
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include(`sof/tokens.m4')
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# Include Platform specific DSP configuration
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include(`platform/intel/'PLATFORM`.m4')
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DEBUG_START
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#
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# Define the pipelines
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#
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# PCM0 ---> volume ----> ALH 2 BE dailink 0
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# PCM1 <--- volume <---- ALH 3 BE dailink 1
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# PCM2 ---> volume ----> ALH 2 BE dailink 2
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ifdef(`MONO', `',
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`# PCM3 ---> volume ----> ALH 2 BE dailink 3')
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# PCM4 <--- volume <---- ALH 2 BE dailink 4
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# PCM5 ---> volume <---- iDisp1
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# PCM6 ---> volume <---- iDisp2
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# PCM7 ---> volume <---- iDisp3
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dnl PIPELINE_PCM_ADD(pipeline,
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dnl pipe id, pcm, max channels, format,
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dnl period, priority, core,
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dnl pcm_min_rate, pcm_max_rate, pipeline_rate,
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dnl time_domain, sched_comp)
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# Low Latency playback pipeline 1 on PCM 0 using max 2 channels of s32le.
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# Schedule 48 frames per 1000us deadline on core 0 with priority 0
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PIPELINE_PCM_ADD(sof/pipe-volume-playback.m4,
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1, 0, 2, s32le,
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1000, 0, 0,
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48000, 48000, 48000)
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# Low Latency capture pipeline 2 on PCM 1 using max 2 channels of s32le.
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# Schedule 48 frames per 1000us deadline on core 0 with priority 0
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PIPELINE_PCM_ADD(sof/pipe-volume-switch-capture.m4,
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2, 1, 2, s32le,
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1000, 0, 0,
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48000, 48000, 48000)
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# Low Latency playback pipeline 3 on PCM 2 using max 2 channels of s32le.
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# Schedule 48 frames per 1000us deadline on core 0 with priority 0
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PIPELINE_PCM_ADD(sof/pipe-volume-demux-playback.m4,
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3, 2, 2, s32le,
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1000, 0, 0,
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48000, 48000, 48000)
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ifdef(`MONO', `',
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`# Low Latency playback pipeline 4 on PCM 3 using max 2 channels of s32le.
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# Schedule 48 frames per 1000us deadline on core 0 with priority 0
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PIPELINE_PCM_ADD(sof/pipe-dai-endpoint.m4,
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4, 3, 2, s32le,
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1000, 0, 0,
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48000, 48000, 48000)')
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# Low Latency capture pipeline 5 on PCM 4 using max 2 channels of s32le.
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# Schedule 48 frames per 1000us deadline on core 0 with priority 0
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PIPELINE_PCM_ADD(sof/pipe-highpass-switch-capture.m4,
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5, 4, 2, s32le,
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1000, 0, 0,
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48000, 48000, 48000)
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# Low Latency playback pipeline 6 on PCM 5 using max 2 channels of s32le.
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# Schedule 48 frames per 1000us deadline on core 0 with priority 0
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PIPELINE_PCM_ADD(sof/pipe-volume-playback.m4,
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6, 5, 2, s32le,
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1000, 0, 0,
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48000, 48000, 48000)
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# Low Latency playback pipeline 7 on PCM 6 using max 2 channels of s32le.
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# Schedule 48 frames per 1000us deadline on core 0 with priority 0
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PIPELINE_PCM_ADD(sof/pipe-volume-playback.m4,
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7, 6, 2, s32le,
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1000, 0, 0,
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48000, 48000, 48000)
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# Low Latency playback pipeline 8 on PCM 7 using max 2 channels of s32le.
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# Schedule 48 frames per 1000us deadline on core 0 with priority 0
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PIPELINE_PCM_ADD(sof/pipe-volume-playback.m4,
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8, 7, 2, s32le,
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1000, 0, 0,
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48000, 48000, 48000)
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#
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# DAIs configuration
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#
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dnl DAI_ADD(pipeline,
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dnl pipe id, dai type, dai_index, dai_be,
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dnl buffer, periods, format,
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dnl deadline, priority, core, time_domain)
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# playback DAI is ALH(SDW0 PIN2) using 2 periods
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# Buffers use s24le format, with 48 frame per 1000us on core 0 with priority 0
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DAI_ADD(sof/pipe-dai-playback.m4,
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1, ALH, 2, SDW0-Playback,
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PIPELINE_SOURCE_1, 2, s24le,
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1000, 0, 0, SCHEDULE_TIME_DOMAIN_TIMER)
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# capture DAI is ALH(SDW0 PIN2) using 2 periods
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# Buffers use s24le format, with 48 frame per 1000us on core 0 with priority 0
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DAI_ADD(sof/pipe-dai-capture.m4,
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2, ALH, 3, SDW0-Capture,
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PIPELINE_SINK_2, 2, s24le,
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1000, 0, 0, SCHEDULE_TIME_DOMAIN_TIMER)
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# playback DAI is ALH(SDW1 PIN2) using 2 periods
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# Buffers use s24le format, with 48 frame per 1000us on core 0 with priority 0
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DAI_ADD(sof/pipe-dai-playback.m4,
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3, ALH, 0x102, SDW1-Playback,
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PIPELINE_SOURCE_3, 2, s24le,
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1000, 0, 0, SCHEDULE_TIME_DOMAIN_TIMER)
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ifdef(`MONO', `',
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`# playback DAI is ALH(SDW2 PIN2) using 2 periods
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# Buffers use s24le format, with 48 frame per 1000us on core 0 with priority 0
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DAI_ADD_SCHED(sof/pipe-dai-sched-playback.m4,
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4, ALH, 0x202, SDW1-Playback,
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PIPELINE_SOURCE_4, 2, s24le,
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1000, 0, 0, SCHEDULE_TIME_DOMAIN_TIMER,
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PIPELINE_PLAYBACK_SCHED_COMP_3)
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# Connect demux to 2nd pipeline
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SectionGraph."PIPE_DEMUX" {
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index "4"
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lines [
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# mux to 2nd pipeline
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dapm(PIPELINE_SOURCE_4, PIPELINE_DEMUX_3)
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]
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}
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')
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# capture DAI is ALH(SDW3 PIN2) using 2 periods
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# Buffers use s24le format, with 48 frame per 1000us on core 0 with priority 0
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DAI_ADD(sof/pipe-dai-capture.m4,
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5, ALH, 0x302, SDW3-Capture,
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PIPELINE_SINK_5, 2, s24le,
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1000, 0, 0, SCHEDULE_TIME_DOMAIN_TIMER)
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# playback DAI is iDisp1 using 2 periods
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# # Buffers use s32le format, 1000us deadline on core 0 with priority 0
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DAI_ADD(sof/pipe-dai-playback.m4,
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6, HDA, 0, iDisp1,
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PIPELINE_SOURCE_6, 2, s32le,
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1000, 0, 0, SCHEDULE_TIME_DOMAIN_TIMER)
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# playback DAI is iDisp2 using 2 periods
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# # Buffers use s32le format, 1000us deadline on core 0 with priority 0
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DAI_ADD(sof/pipe-dai-playback.m4,
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7, HDA, 1, iDisp2,
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PIPELINE_SOURCE_7, 2, s32le,
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1000, 0, 0, SCHEDULE_TIME_DOMAIN_TIMER)
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# playback DAI is iDisp3 using 2 periods
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# # Buffers use s32le format, 1000us deadline on core 0 with priority 0
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DAI_ADD(sof/pipe-dai-playback.m4,
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8, HDA, 2, iDisp3,
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PIPELINE_SOURCE_8, 2, s32le,
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1000, 0, 0, SCHEDULE_TIME_DOMAIN_TIMER)
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# PCM Low Latency, id 0
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dnl PCM_PLAYBACK_ADD(name, pcm_id, playback)
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PCM_PLAYBACK_ADD(Headphone, 0, PIPELINE_PCM_1)
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PCM_CAPTURE_ADD(Headset mic, 1, PIPELINE_PCM_2)
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PCM_PLAYBACK_ADD(SDW1-speakers, 2, PIPELINE_PCM_3)
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PCM_CAPTURE_ADD(Microphones, 4, PIPELINE_PCM_5)
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PCM_PLAYBACK_ADD(HDMI1, 5, PIPELINE_PCM_6)
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PCM_PLAYBACK_ADD(HDMI2, 6, PIPELINE_PCM_7)
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PCM_PLAYBACK_ADD(HDMI3, 7, PIPELINE_PCM_8)
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#
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# BE configurations - overrides config in ACPI if present
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#
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#ALH dai index = ((link_id << 8) | PDI id)
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#ALH SDW0 Pin2 (ID: 0)
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DAI_CONFIG(ALH, 2, 0, SDW0-Playback)
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#ALH SDW0 Pin3 (ID: 1)
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DAI_CONFIG(ALH, 3, 1, SDW0-Capture)
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#ALH SDW1 Pin2 (ID: 2)
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DAI_CONFIG(ALH, 0x102, 2, SDW1-Playback)
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#ALH SDW3 Pin2 (ID: 4)
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DAI_CONFIG(ALH, 0x302, 4, SDW3-Capture)
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# 3 HDMI/DP outputs (ID: 5,6,7)
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DAI_CONFIG(HDA, 0, 5, iDisp1)
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DAI_CONFIG(HDA, 1, 6, iDisp2)
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DAI_CONFIG(HDA, 2, 7, iDisp3)
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DEBUG_END
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