mirror of https://github.com/thesofproject/sof.git
183 lines
5.0 KiB
C
183 lines
5.0 KiB
C
/* SPDX-License-Identifier: BSD-3-Clause
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*
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* Copyright(c) 2018 Intel Corporation. All rights reserved.
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*
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* Author: Tomasz Lauda <tomasz.lauda@linux.intel.com>
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*/
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/**
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* \file include/rtos/idc.h
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* \brief IDC header file
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* \authors Tomasz Lauda <tomasz.lauda@linux.intel.com>
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*/
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#ifndef __XTOS_RTOS_IDC_H__
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#define __XTOS_RTOS_IDC_H__
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#include <arch/drivers/idc.h>
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#include <platform/drivers/idc.h>
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#include <rtos/task.h>
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#include <sof/trace/trace.h>
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#include <user/trace.h>
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#include <stdint.h>
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#include <rtos/cache.h>
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/** \brief IDC send blocking flag. */
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#define IDC_BLOCKING 0
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/** \brief IDC send non-blocking flag. */
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#define IDC_NON_BLOCKING 1
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/** \brief IDC send core power up flag. */
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#define IDC_POWER_UP 2
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/** \brief IDC send core power down flag. */
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#define IDC_POWER_DOWN 3
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/** \brief IDC send timeout in microseconds. */
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#define IDC_TIMEOUT 10000
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/** \brief IDC task deadline. */
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#define IDC_DEADLINE 100
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/** \brief ROM wake version parsed by ROM during core wake up. */
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#define IDC_ROM_WAKE_VERSION 0x2
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/** \brief IDC message type. */
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#define IDC_TYPE_SHIFT 24
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#define IDC_TYPE_MASK 0x7f
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#define IDC_TYPE(x) (((x) & IDC_TYPE_MASK) << IDC_TYPE_SHIFT)
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/** \brief IDC message header. */
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#define IDC_HEADER_MASK 0xffffff
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#define IDC_HEADER(x) ((x) & IDC_HEADER_MASK)
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/** \brief IDC message extension. */
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#define IDC_EXTENSION_MASK 0x3fffffff
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#define IDC_EXTENSION(x) ((x) & IDC_EXTENSION_MASK)
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/** \brief IDC power up message. */
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#define IDC_MSG_POWER_UP (IDC_TYPE(0x1) | \
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IDC_HEADER(IDC_ROM_WAKE_VERSION))
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#define IDC_MSG_POWER_UP_EXT IDC_EXTENSION(SOF_TEXT_START >> 2)
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/** \brief IDC power down message. */
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#define IDC_MSG_POWER_DOWN IDC_TYPE(0x2)
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#define IDC_MSG_POWER_DOWN_EXT IDC_EXTENSION(0x0)
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/** \brief IDC notify message. */
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#define IDC_MSG_NOTIFY IDC_TYPE(0x3)
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#define IDC_MSG_NOTIFY_EXT IDC_EXTENSION(0x0)
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/** \brief IDC IPC processing message. */
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#define IDC_MSG_IPC IDC_TYPE(0x4)
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#define IDC_MSG_IPC_EXT IDC_EXTENSION(0x0)
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/** \brief IDC component params message. */
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#define IDC_MSG_PARAMS IDC_TYPE(0x5)
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#define IDC_MSG_PARAMS_EXT(x) IDC_EXTENSION(x)
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/** \brief IDC component prepare message. */
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#define IDC_MSG_PREPARE IDC_TYPE(0x6)
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#define IDC_MSG_PREPARE_EXT(x) IDC_EXTENSION(x)
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/** \brief IDC component trigger message. */
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#define IDC_MSG_TRIGGER IDC_TYPE(0x7)
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#define IDC_MSG_TRIGGER_EXT(x) IDC_EXTENSION(x)
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/** \brief IDC component reset message. */
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#define IDC_MSG_RESET IDC_TYPE(0x8)
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#define IDC_MSG_RESET_EXT(x) IDC_EXTENSION(x)
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/** \brief IDC prepare D0ix message. */
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#define IDC_MSG_PREPARE_D0ix IDC_TYPE(0x9)
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#define IDC_MSG_PREPARE_D0ix_EXT IDC_EXTENSION(0x0)
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/** \brief IDC secondary core crashed notify message. */
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#define IDC_MSG_SECONDARY_CORE_CRASHED IDC_TYPE(0xA)
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#define IDC_MSG_SECONDARY_CORE_CRASHED_EXT(x) IDC_EXTENSION(x)
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/** \brief IDC process async msg */
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#define IDC_MSG_AMS IDC_TYPE(0xB)
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#define IDC_MSG_AMS_EXT IDC_EXTENSION(0x0)
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#define IDC_MSG_BIND IDC_TYPE(0xD)
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#define IDC_MSG_UNBIND IDC_TYPE(0xE)
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#define IDC_MSG_GET_ATTRIBUTE IDC_TYPE(0xF)
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#define IDC_HEADER_TO_AMS_SLOT_MASK(x) (x & 0xFFFF)
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/** \brief IDC_MSG_SECONDARY_CORE_CRASHED header fields. */
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#define IDC_SCC_CORE_SHIFT 0
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#define IDC_SCC_CORE_MASK 0xff
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#define IDC_SCC_CORE(x) (((x) & IDC_SCC_CORE_MASK) << IDC_SCC_CORE_SHIFT)
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#define IDC_SCC_REASON_SHIFT 8
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#define IDC_SCC_REASON_MASK 0xff
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#define IDC_SCC_REASON(x) (((x) & IDC_SCC_REASON_MASK) << IDC_SCC_REASON_SHIFT)
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/** \brief Secondary core crash reasons. */
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#define IDC_SCC_REASON_WATCHDOG 0x00
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#define IDC_SCC_REASON_EXCEPTION 0x01
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/** \brief Decodes IDC message type. */
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#define iTS(x) (((x) >> IDC_TYPE_SHIFT) & IDC_TYPE_MASK)
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/** \brief Max IDC message payload size in bytes. */
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#define IDC_MAX_PAYLOAD_SIZE (DCACHE_LINE_SIZE * 2)
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/** \brief IDC free function flags */
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#define IDC_FREE_IRQ_ONLY BIT(0) /**< disable only irqs */
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/** \brief IDC message payload. */
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struct idc_payload {
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uint8_t data[IDC_MAX_PAYLOAD_SIZE];
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};
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/** \brief IDC message. */
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struct idc_msg {
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uint32_t header; /**< header value */
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uint32_t extension; /**< extension value */
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uint32_t core; /**< core id */
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uint32_t size; /**< payload size in bytes */
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void *payload; /**< pointer to payload data */
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};
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/** \brief IDC data. */
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struct idc {
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uint32_t busy_bit_mask; /**< busy interrupt mask */
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struct idc_msg received_msg; /**< received message */
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struct task idc_task; /**< IDC processing task */
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struct idc_payload *payload;
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int irq;
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};
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/* idc trace context, used by multiple units */
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extern struct tr_ctx idc_tr;
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static inline struct idc_payload *idc_payload_get(struct idc *idc,
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uint32_t core)
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{
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return idc->payload + core;
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}
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void idc_enable_interrupts(int target_core, int source_core);
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void idc_free(uint32_t flags);
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int platform_idc_init(void);
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int platform_idc_restore(void);
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enum task_state idc_do_cmd(void *data);
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void idc_cmd(struct idc_msg *msg);
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int idc_wait_in_blocking_mode(uint32_t target_core, bool (*cond)(int));
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int idc_msg_status_get(uint32_t core);
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void idc_init_thread(void);
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#endif /* __XTOS_RTOS_IDC_H__ */
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