mirror of https://github.com/thesofproject/sof.git
247 lines
7.5 KiB
Plaintext
247 lines
7.5 KiB
Plaintext
#
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# Topology for Tigerlake with sdw rt5682 + Max98373 amp + DMIC + 4 HDMI
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#
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# Include topology builder
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include(`utils.m4')
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include(`dai.m4')
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include(`pipeline.m4')
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include(`alh.m4')
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include(`hda.m4')
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# Include TLV library
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include(`common/tlv.m4')
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# Include Token library
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include(`sof/tokens.m4')
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# Include Tigerlake DSP configuration
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include(`platform/intel/'PLATFORM`.m4')
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include(`platform/intel/dmic.m4')
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define(DMIC_PDM_CONFIG, ifelse(CHANNELS, `4', ``FOUR_CH_PDM0_PDM1'',
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`ifelse(CHANNELS, `2', ``STEREO_PDM0'', `')'))
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DEBUG_START
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#
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# Define the pipelines
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#
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# PCM0 <---> volume <----> playback (Headset - ALC5682)
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# PCM1 <---> volume <----> capture (Headset - ALC5682)
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# PCM2 ----> smart_amp ----> ALH0xy02 (Speaker -max98373)
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# ^
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# |
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# |
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# PCM3 <---- demux <----- ALH0xy03 (Speaker -max98373)
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# PCM5 ----> volume -----> iDisp1
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# PCM6 ----> volume -----> iDisp2
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# PCM7 ----> volume -----> iDisp3
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# PCM8 ----> volume -----> iDisp4
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# PCM10 <---- volume <---- DMIC01 (dmic 48k capture)
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# PCM12 <---- kpb <---- DMIC16k (dmic 16k capture)
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# PCM14 <---> passthrough <---> SSP2 (Bluetooth playback/capture)
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define(`SDW', 1)
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# Smart amplifier related
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# ALH related
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ifelse(PLATFORM, `tgl',
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` #define smart amplifier ALH index
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define(`SMART_ALH_INDEX', 0x102)
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#define ALH BE dai_link name
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define(`SMART_ALH_PLAYBACK_NAME', `SDW1-Playback')
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define(`SMART_ALH_CAPTURE_NAME', `SDW1-Capture')
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', `')
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ifelse(PLATFORM, `adl',
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` define(`SMART_ALH_INDEX', 0x202)
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define(`SMART_ALH_PLAYBACK_NAME', `SDW2-Playback')
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define(`SMART_ALH_CAPTURE_NAME', `SDW2-Capture')
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# Add BT audio offload support
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define(`BT_PIPELINE_PB_ID', `14') dnl DMIC_PIPELINE_KWD_ID + 1
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define(`BT_PIPELINE_CP_ID', `15') dnl DMIC_PIPELINE_KWD_ID + 2
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define(`BT_DAI_LINK_ID', `10')
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define(`BT_PCM_ID', `14')
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define(`HW_CONFIG_ID', `10')
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include(`platform/intel/intel-generic-bt.m4')
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', `')
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#define BE dai_link ID
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define(`SMART_BE_ID', 2)
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# Playback related
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define(`SMART_PB_PPL_ID', 3)
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define(`SMART_PB_CH_NUM', 2)
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# channel number for playback on sdw link
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define(`SMART_TX_CHANNELS', 2)
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# channel number for I/V feedback on sdw link
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define(`SMART_RX_CHANNELS', 4)
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# Smart_amp algorithm specific. channel number
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# for feedback provided to smart_amp algorithm
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define(`SMART_FB_CHANNELS', 4)
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# Ref capture related
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define(`SMART_REF_PPL_ID', 4)
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define(`SMART_REF_CH_NUM', 2)
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# PCM related
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define(`SMART_PCM_ID', 2)
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define(`SMART_PCM_NAME', `Speaker')
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# Include Smart Amplifier support
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include(`sof-smart-amplifier.m4')
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dnl PIPELINE_PCM_ADD(pipeline,
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dnl pipe id, pcm, max channels, format,
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dnl period, priority, core,
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dnl pcm_min_rate, pcm_max_rate, pipeline_rate,
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dnl time_domain, sched_comp)
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# Low Latency playback pipeline 1 on PCM 0 using max 2 channels of s32le.
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# Schedule 48 frames per 1000us deadline with priority 0 on core 0
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PIPELINE_PCM_ADD(sof/pipe-volume-playback.m4,
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1, 0, 2, s32le,
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1000, 0, 0,
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48000, 48000, 48000)
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# Low Latency capture pipeline 2 on PCM 1 using max 2 channels of s32le.
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# Schedule 48 frames per 1000us deadline with priority 0 on core 0
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PIPELINE_PCM_ADD(sof/pipe-volume-capture.m4,
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2, 1, 2, s32le,
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1000, 0, 0,
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48000, 48000, 48000)
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# Define pipeline id for intel-generic-dmic-kwd.m4
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# to generate dmic setting with kwd when we have dmic
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# define channel
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define(CHANNELS, `4')
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# define kfbm with volume
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define(KFBM_TYPE, `vol-kfbm')
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# define pcm, pipeline and dai id
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define(DMIC_PCM_48k_ID, `10')
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define(DMIC_PIPELINE_48k_ID, `11')
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define(DMIC_DAI_LINK_48k_ID, `4')
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define(DMIC_PCM_16k_ID, `12')
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define(DMIC_PIPELINE_16k_ID, `12')
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define(DMIC_PIPELINE_KWD_ID, `13')
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define(DMIC_DAI_LINK_16k_ID, `5')
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define(DMIC_16k_PCM_NAME, `BufferedMic')
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# define pcm, pipeline and dai id
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define(KWD_PIPE_SCH_DEADLINE_US, 5000)
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# include the generic dmic with kwd
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include(`platform/intel/intel-generic-dmic-kwd.m4')
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# Low Latency playback pipeline 6 on PCM 5 using max 2 channels of s32le.
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# Schedule 48 frames per 1000us deadline with priority 0 on core 0
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PIPELINE_PCM_ADD(sof/pipe-volume-playback.m4,
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6, 5, 2, s32le,
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1000, 0, 0,
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48000, 48000, 48000)
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# Low Latency playback pipeline 7 on PCM 6 using max 2 channels of s32le.
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# Schedule 48 frames per 1000us deadline with priority 0 on core 0
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PIPELINE_PCM_ADD(sof/pipe-volume-playback.m4,
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7, 6, 2, s32le,
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1000, 0, 0,
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48000, 48000, 48000)
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# Low Latency playback pipeline 8 on PCM 7 using max 2 channels of s32le.
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# Schedule 48 frames per 1000us deadline with priority 0 on core 0
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PIPELINE_PCM_ADD(sof/pipe-volume-playback.m4,
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8, 7, 2, s32le,
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1000, 0, 0,
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48000, 48000, 48000)
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# Low Latency playback pipeline 9 on PCM 8 using max 2 channels of s32le.
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# Schedule 48 frames per 1000us deadline with priority 0 on core 0
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PIPELINE_PCM_ADD(sof/pipe-volume-playback.m4,
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9, 8, 2, s32le,
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1000, 0, 0,
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48000, 48000, 48000)
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#
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# DAIs configuration
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#
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dnl DAI_ADD(pipeline,
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dnl pipe id, dai type, dai_index, dai_be,
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dnl buffer, periods, format,
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dnl deadline, priority, core, time_domain)
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# playback DAI is ALH(ALH0 PIN2) using 2 periods
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# Buffers use s24le format, with 48 frame per 1000us on core 0 with priority 0
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DAI_ADD(sof/pipe-dai-playback.m4,
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1, ALH, 2, SDW0-Playback,
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PIPELINE_SOURCE_1, 2, s24le,
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1000, 0, 0, SCHEDULE_TIME_DOMAIN_TIMER)
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# capture DAI is ALH(ALH0 PIN2) using 2 periods
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# Buffers use s24le format, with 48 frame per 1000us on core 0 with priority 0
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DAI_ADD(sof/pipe-dai-capture.m4,
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2, ALH, 3, SDW0-Capture,
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PIPELINE_SINK_2, 2, s24le,
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1000, 0, 0, SCHEDULE_TIME_DOMAIN_TIMER)
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# playback DAI is iDisp1 using 2 periods
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# Buffers use s32le format, with 48 frame per 1000us on core 0 with priority 0
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DAI_ADD(sof/pipe-dai-playback.m4,
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6, HDA, 0, iDisp1,
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PIPELINE_SOURCE_6, 2, s32le,
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1000, 0, 0, SCHEDULE_TIME_DOMAIN_TIMER)
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# playback DAI is iDisp2 using 2 periods
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# Buffers use s32le format, with 48 frame per 1000us on core 0 with priority 0
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DAI_ADD(sof/pipe-dai-playback.m4,
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7, HDA, 1, iDisp2,
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PIPELINE_SOURCE_7, 2, s32le,
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1000, 0, 0, SCHEDULE_TIME_DOMAIN_TIMER)
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# playback DAI is iDisp3 using 2 periods
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# Buffers use s32le format, with 48 frame per 1000us on core 0 with priority 0
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DAI_ADD(sof/pipe-dai-playback.m4,
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8, HDA, 2, iDisp3,
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PIPELINE_SOURCE_8, 2, s32le,
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1000, 0, 0, SCHEDULE_TIME_DOMAIN_TIMER)
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# playback DAI is iDisp4 using 2 periods
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# Buffers use s32le format, with 48 frame per 1000us on core 0 with priority 0
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DAI_ADD(sof/pipe-dai-playback.m4,
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9, HDA, 3, iDisp4,
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PIPELINE_SOURCE_9, 2, s32le,
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1000, 0, 0, SCHEDULE_TIME_DOMAIN_TIMER)
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#
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# Bind PCM with the pipeline
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#
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dnl PCM_PLAYBACK_ADD(name, pcm_id, playback)
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PCM_PLAYBACK_ADD(Jack Out, 0, PIPELINE_PCM_1)
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PCM_CAPTURE_ADD(Jack In, 1, PIPELINE_PCM_2)
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PCM_PLAYBACK_ADD(HDMI 1, 5, PIPELINE_PCM_6)
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PCM_PLAYBACK_ADD(HDMI 2, 6, PIPELINE_PCM_7)
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PCM_PLAYBACK_ADD(HDMI 3, 7, PIPELINE_PCM_8)
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PCM_PLAYBACK_ADD(HDMI 4, 8, PIPELINE_PCM_9)
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#
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# BE configurations - overrides config in ACPI if present
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#
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dnl DAI_CONFIG(type, dai_index, link_id, name, ssp_config/dmic_config)
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#ALH SDW0 Pin2 (ID: 0)
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DAI_CONFIG(ALH, 2, 0, SDW0-Playback,
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ALH_CONFIG(ALH_CONFIG_DATA(ALH, 2, 48000, 2)))
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#ALH SDW0 Pin3 (ID: 1)
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DAI_CONFIG(ALH, 3, 1, SDW0-Capture,
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ALH_CONFIG(ALH_CONFIG_DATA(ALH, 3, 48000, 2)))
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# 4 HDMI/DP outputs (ID: 6,7,8,9)
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DAI_CONFIG(HDA, 0, 6, iDisp1,
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HDA_CONFIG(HDA_CONFIG_DATA(HDA, 0, 48000, 2)))
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DAI_CONFIG(HDA, 1, 7, iDisp2,
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HDA_CONFIG(HDA_CONFIG_DATA(HDA, 1, 48000, 2)))
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DAI_CONFIG(HDA, 2, 8, iDisp3,
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HDA_CONFIG(HDA_CONFIG_DATA(HDA, 2, 48000, 2)))
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DAI_CONFIG(HDA, 3, 9, iDisp4,
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HDA_CONFIG(HDA_CONFIG_DATA(HDA, 3, 48000, 2)))
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DEBUG_END
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