mirror of https://github.com/thesofproject/sof.git
278 lines
8.5 KiB
Plaintext
278 lines
8.5 KiB
Plaintext
#
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# Topology for Tigerlake with Max98357a amp + rt5682 codec + DMIC + 4 HDMI
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#
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# Include topology builder
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include(`utils.m4')
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include(`dai.m4')
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include(`pipeline.m4')
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include(`ssp.m4')
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include(`muxdemux.m4')
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include(`hda.m4')
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# Include TLV library
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include(`common/tlv.m4')
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# Include Token library
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include(`sof/tokens.m4')
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# Include Tigerlake DSP configuration
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include(`platform/intel/tgl.m4')
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include(`platform/intel/dmic.m4')
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DEBUG_START
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#
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# Define the demux configure
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#
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dnl Configure demux
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dnl name, pipeline_id, routing_matrix_rows
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dnl Diagonal 1's in routing matrix mean that every input channel is
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dnl copied to corresponding output channels in all output streams.
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dnl I.e. row index is the input channel, 1 means it is copied to
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dnl corresponding output channel (column index), 0 means it is discarded.
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dnl There's a separate matrix for all outputs.
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define(matrix1, `ROUTE_MATRIX(1,
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`BITS_TO_BYTE(1, 0, 0 ,0 ,0 ,0 ,0 ,0)',
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`BITS_TO_BYTE(0, 1, 0 ,0 ,0 ,0 ,0 ,0)',
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`BITS_TO_BYTE(0, 0, 1 ,0 ,0 ,0 ,0 ,0)',
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`BITS_TO_BYTE(0, 0, 0 ,1 ,0 ,0 ,0 ,0)',
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`BITS_TO_BYTE(0, 0, 0 ,0 ,1 ,0 ,0 ,0)',
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`BITS_TO_BYTE(0, 0, 0 ,0 ,0 ,1 ,0 ,0)',
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`BITS_TO_BYTE(0, 0, 0 ,0 ,0 ,0 ,1 ,0)',
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`BITS_TO_BYTE(0, 0, 0 ,0 ,0 ,0 ,0 ,1)')')
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define(matrix2, `ROUTE_MATRIX(9,
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`BITS_TO_BYTE(1, 0, 0 ,0 ,0 ,0 ,0 ,0)',
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`BITS_TO_BYTE(0, 1, 0 ,0 ,0 ,0 ,0 ,0)',
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`BITS_TO_BYTE(0, 0, 1 ,0 ,0 ,0 ,0 ,0)',
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`BITS_TO_BYTE(0, 0, 0 ,1 ,0 ,0 ,0 ,0)',
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`BITS_TO_BYTE(0, 0, 0 ,0 ,1 ,0 ,0 ,0)',
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`BITS_TO_BYTE(0, 0, 0 ,0 ,0 ,1 ,0 ,0)',
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`BITS_TO_BYTE(0, 0, 0 ,0 ,0 ,0 ,1 ,0)',
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`BITS_TO_BYTE(0, 0, 0 ,0 ,0 ,0 ,0 ,1)')')
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dnl name, num_streams, route_matrix list
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MUXDEMUX_CONFIG(demux_priv, 2, LIST(` ', `matrix1,', `matrix2'))
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#
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# Define the pipelines
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#
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# PCM0 --> volume --> demux --> SSP1 (Speaker - max98357a)
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# |
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# PCM6 <----------------+
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# PCM1 <---> volume <----> SSP0 (Headset - ALC5682)
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# PCM99 <---- volume <----- DMIC01 (dmic0 capture)
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# PCM2 ----> volume -----> iDisp1
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# PCM3 ----> volume -----> iDisp2
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# PCM4 ----> volume -----> iDisp3
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# PCM5 ----> volume -----> iDisp4
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# PCM99 <---- volume <---- DMIC01 (dmic 48k capture)
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# PCM100 <---- kpb <---- DMIC16K (dmic 16k capture)
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# Define pipeline id for sof-tgl-max98357a-rt5682.m4
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# to generate dmic setting with kwd when we have dmic
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# define channel
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define(CHANNELS, `4')
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# define kfbm with volume
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define(KFBM_TYPE, `vol-kfbm')
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# define pcm, pipeline and dai id
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define(DMIC_PCM_48k_ID, `99')
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define(DMIC_PIPELINE_48k_ID, `10')
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define(DMIC_DAI_LINK_48k_ID, `1')
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define(DMIC_PCM_16k_ID, `100')
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define(DMIC_PIPELINE_16k_ID, `11')
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define(DMIC_PIPELINE_KWD_ID, `12')
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define(DMIC_DAI_LINK_16k_ID, `2')
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# define pcm, pipeline and dai id
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define(KWD_PIPE_SCH_DEADLINE_US, 20000)
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# include the generic dmic with kwd
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include(`platform/intel/intel-generic-dmic-kwd.m4')
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dnl PIPELINE_PCM_ADD(pipeline,
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dnl pipe id, pcm, max channels, format,
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dnl frames, deadline, priority, core)
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# Low Latency playback pipeline 1 on PCM 0 using max 2 channels of s24le.
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# Schedule 48 frames per 1000us deadline on core 0 with priority 0
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PIPELINE_PCM_ADD(sof/pipe-volume-demux-playback.m4,
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1, 0, 2, s32le,
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1000, 0, 0,
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48000, 48000, 48000)
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# Low Latency playback pipeline 2 on PCM 1 using max 2 channels of s24le.
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# Schedule 48 frames per 1000us deadline on core 0 with priority 0
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PIPELINE_PCM_ADD(sof/pipe-volume-playback.m4,
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2, 1, 2, s32le,
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1000, 0, 0,
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48000, 48000, 48000)
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# Low Latency capture pipeline 3 on PCM 1 using max 2 channels of s24le.
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# Schedule 48 frames per 1000us deadline on core 0 with priority 0
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PIPELINE_PCM_ADD(sof/pipe-volume-capture.m4,
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3, 1, 2, s32le,
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1000, 0, 0,
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48000, 48000, 48000)
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# Low Latency playback pipeline 2 on PCM 2 using max 2 channels of s32le.
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# Schedule 48 frames per 1000us deadline on core 0 with priority 0
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PIPELINE_PCM_ADD(sof/pipe-volume-playback.m4,
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5, 2, 2, s32le,
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1000, 0, 0,
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48000, 48000, 48000)
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# Low Latency playback pipeline 3 on PCM 3 using max 2 channels of s32le.
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# Schedule 48 frames per 1000us deadline on core 0 with priority 0
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PIPELINE_PCM_ADD(sof/pipe-volume-playback.m4,
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6, 3, 2, s32le,
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1000, 0, 0,
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48000, 48000, 48000)
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# Low Latency playback pipeline 4 on PCM 4 using max 2 channels of s32le.
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# Schedule 48 frames per 1000us deadline on core 0 with priority 0
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PIPELINE_PCM_ADD(sof/pipe-volume-playback.m4,
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7, 4, 2, s32le,
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1000, 0, 0,
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48000, 48000, 48000)
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# Low Latency playback pipeline 5 on PCM 5 using max 2 channels of s32le.
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# Schedule 48 frames per 1000us deadline on core 0 with priority 0
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PIPELINE_PCM_ADD(sof/pipe-volume-playback.m4,
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8, 5, 2, s32le,
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1000, 0, 0,
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48000, 48000, 48000)
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# DAIs configuration
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#
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dnl DAI_ADD(pipeline,
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dnl pipe id, dai type, dai_index, dai_be,
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dnl buffer, periods, format,
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dnl frames, deadline, priority, core)
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# playback DAI is SSP1 using 2 periods
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# Buffers use s16le format, with 48 frame per 1000us on core 0 with priority 0
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DAI_ADD(sof/pipe-dai-playback.m4,
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1, SSP, 1, SSP1-Codec,
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PIPELINE_SOURCE_1, 2, s16le,
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1000, 0, 0)
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# currently this dai is here as "virtual" capture backend
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W_DAI_IN(SSP, 1, SSP1-Codec, s16le, 3, 0)
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# Capture pipeline 9 from demux on PCM 6 using max 2 channels of s32le.
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PIPELINE_PCM_ADD(sof/pipe-passthrough-capture-sched.m4,
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9, 6, 2, s32le,
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1000, 1, 0,
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48000, 48000, 48000,
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SCHEDULE_TIME_DOMAIN_TIMER,
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PIPELINE_PLAYBACK_SCHED_COMP_1)
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# Connect demux to capture
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SectionGraph."PIPE_CAP" {
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index "0"
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lines [
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# mux to capture
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dapm(PIPELINE_SINK_9, PIPELINE_DEMUX_1)
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]
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}
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# Connect virtual capture to dai
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SectionGraph."PIPE_CAP_VIRT" {
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index "9"
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lines [
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# mux to capture
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dapm(ECHO REF 9, SSP1.IN)
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]
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}
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# playback DAI is SSP0 using 2 periods
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# Buffers use s24le format, with 48 frame per 1000us on core 0 with priority 0
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DAI_ADD(sof/pipe-dai-playback.m4,
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2, SSP, 0, SSP0-Codec,
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PIPELINE_SOURCE_2, 2, s24le,
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1000, 0, 0)
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# capture DAI is SSP0 using 2 periods
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# Buffers use s24le format, with 48 frame per 1000us on core 0 with priority 0
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DAI_ADD(sof/pipe-dai-capture.m4,
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3, SSP, 0, SSP0-Codec,
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PIPELINE_SINK_3, 2, s24le,
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1000, 0, 0)
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# playback DAI is iDisp1 using 2 periods
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# Buffers use s32le format, with 48 frame per 1000us on core 0 with priority 0
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DAI_ADD(sof/pipe-dai-playback.m4,
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5, HDA, 0, iDisp1,
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PIPELINE_SOURCE_5, 2, s32le,
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1000, 0, 0, SCHEDULE_TIME_DOMAIN_TIMER)
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# playback DAI is iDisp2 using 2 periods
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# Buffers use s32le format, with 48 frame per 1000us on core 0 with priority 0
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DAI_ADD(sof/pipe-dai-playback.m4,
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6, HDA, 1, iDisp2,
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PIPELINE_SOURCE_6, 2, s32le,
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1000, 0, 0, SCHEDULE_TIME_DOMAIN_TIMER)
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# playback DAI is iDisp3 using 2 periods
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# Buffers use s32le format, with 48 frame per 1000us on core 0 with priority 0
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DAI_ADD(sof/pipe-dai-playback.m4,
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7, HDA, 2, iDisp3,
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PIPELINE_SOURCE_7, 2, s32le,
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1000, 0, 0, SCHEDULE_TIME_DOMAIN_TIMER)
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# playback DAI is iDisp4 using 2 periods
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# Buffers use s32le format, with 48 frame per 1000us on core 0 with priority 0
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DAI_ADD(sof/pipe-dai-playback.m4,
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8, HDA, 3, iDisp4,
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PIPELINE_SOURCE_8, 2, s32le,
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1000, 0, 0, SCHEDULE_TIME_DOMAIN_TIMER)
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# PCM Low Latency, id 0
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dnl PCM_PLAYBACK_ADD(name, pcm_id, playback)
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PCM_PLAYBACK_ADD(max357a-spk, 0, PIPELINE_PCM_1)
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PCM_DUPLEX_ADD(Headset, 1, PIPELINE_PCM_2, PIPELINE_PCM_3)
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PCM_PLAYBACK_ADD(HDMI1, 2, PIPELINE_PCM_5)
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PCM_PLAYBACK_ADD(HDMI2, 3, PIPELINE_PCM_6)
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PCM_PLAYBACK_ADD(HDMI3, 4, PIPELINE_PCM_7)
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PCM_PLAYBACK_ADD(HDMI4, 5, PIPELINE_PCM_8)
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PCM_CAPTURE_ADD(EchoRef, 6, PIPELINE_PCM_9)
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#
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# BE conf2igurations - overrides config in ACPI if present
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#
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dnl DAI_CONFIG(type, dai_index, link_id, name, ssp_config/dmic_config)
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dnl SSP_CONFIG(format, mclk, bclk, fsync, tdm, ssp_config_data)
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dnl SSP_CLOCK(clock, freq, codec_master, polarity)
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dnl SSP_CONFIG_DATA(type, idx, valid bits, mclk_id)
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dnl mclk_id is optional
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dnl ssp1-maxmspk
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# SSP 1 (ID: 7)
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DAI_CONFIG(SSP, 1, 7, SSP1-Codec,
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SSP_CONFIG(I2S, SSP_CLOCK(mclk, 19200000, codec_mclk_in),
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SSP_CLOCK(bclk, 1536000, codec_slave),
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SSP_CLOCK(fsync, 48000, codec_slave),
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SSP_TDM(2, 16, 3, 3),
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SSP_CONFIG_DATA(SSP, 1, 16)))
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# SSP 0 (ID: 0)
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DAI_CONFIG(SSP, 0, 0, SSP0-Codec,
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SSP_CONFIG(I2S, SSP_CLOCK(mclk, 19200000, codec_mclk_in),
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SSP_CLOCK(bclk, 2400000, codec_slave),
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SSP_CLOCK(fsync, 48000, codec_slave),
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SSP_TDM(2, 25, 3, 3),
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SSP_CONFIG_DATA(SSP, 0, 24)))
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# 4 HDMI/DP outputs (ID: 3,4,5,6)
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DAI_CONFIG(HDA, 0, 3, iDisp1,
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HDA_CONFIG(HDA_CONFIG_DATA(HDA, 0, 48000, 2)))
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DAI_CONFIG(HDA, 1, 4, iDisp2,
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HDA_CONFIG(HDA_CONFIG_DATA(HDA, 1, 48000, 2)))
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DAI_CONFIG(HDA, 2, 5, iDisp3,
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HDA_CONFIG(HDA_CONFIG_DATA(HDA, 2, 48000, 2)))
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DAI_CONFIG(HDA, 3, 6, iDisp4,
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HDA_CONFIG(HDA_CONFIG_DATA(HDA, 3, 48000, 2)))
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DEBUG_END
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