mirror of https://github.com/thesofproject/sof.git
227 lines
6.3 KiB
Plaintext
227 lines
6.3 KiB
Plaintext
#
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# Topology for generic Apollolake UP^2 with pcm512x codec and HDMI.
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#
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# Include topology builder
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include(`utils.m4')
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include(`dai.m4')
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include(`pipeline.m4')
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include(`ssp.m4')
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include(`hda.m4')
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# Include TLV library
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include(`common/tlv.m4')
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# Include Token library
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include(`sof/tokens.m4')
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# Include Apollolake DSP configuration
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include(`platform/intel/bxt.m4')
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include(`platform/intel/dmic.m4')
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ifdef(`CODEC_MASTER',
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define(SSP_SCHEDULE_TIME_DOMAIN, SCHEDULE_TIME_DOMAIN_DMA),
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define(SSP_SCHEDULE_TIME_DOMAIN, SCHEDULE_TIME_DOMAIN_TIMER))
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DEBUG_START
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#
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# Define the pipelines
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#
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# PCM0 <---> volume <----> SSP5 (pcm512x)
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# PCM1 ----> volume -----> iDisp1
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# PCM2 ----> volume -----> iDisp2
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# PCM3 ----> volume -----> iDisp3
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# PCM4 ----> volume -----> Media Playback 4
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# PCM5 <------------------ DMIC0 (DMIC)
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# PCM6 <------------------ DMIC1 (DMIC16kHz)
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#
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dnl PIPELINE_PCM_ADD(pipeline,
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dnl pipe id, pcm, max channels, format,
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dnl period, priority, core,
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dnl pcm_min_rate, pcm_max_rate, pipeline_rate,
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dnl time_domain, sched_comp)
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# Low Latency playback pipeline 1 on PCM 0 using max 2 channels of s32le.
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# Set 1000us deadline on core 0 with priority 0
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PIPELINE_PCM_ADD(sof/pipe-low-latency-playback.m4,
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1, 0, 2, s32le,
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1000, 0, 0,
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FSYNC, FSYNC, FSYNC)
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# Low Latency capture pipeline 2 on PCM 0 using max 2 channels of s32le.
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# 1000us deadline on core 0 with priority 0
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PIPELINE_PCM_ADD(sof/pipe-volume-capture.m4,
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6, 0, 2, s32le,
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1000, 0, 0,
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FSYNC, FSYNC, FSYNC)
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# Low Latency playback pipeline 2 on PCM 1 using max 2 channels of s32le.
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# 1000us deadline on core 0 with priority 0
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PIPELINE_PCM_ADD(sof/pipe-volume-playback.m4,
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2, 1, 2, s32le,
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1000, 0, 0,
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48000, 48000, 48000)
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# Low Latency playback pipeline 3 on PCM 2 using max 2 channels of s32le.
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# 1000us deadline on core 0 with priority 0
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PIPELINE_PCM_ADD(sof/pipe-volume-playback.m4,
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3, 2, 2, s32le,
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1000, 0, 0,
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48000, 48000, 48000)
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# Low Latency playback pipeline 4 on PCM 3 using max 2 channels of s32le.
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# 1000us deadline on core 0 with priority 0
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PIPELINE_PCM_ADD(sof/pipe-volume-playback.m4,
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4, 3, 2, s32le,
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1000, 0, 0,
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48000, 48000, 48000)
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# DMIC passthrough capture pipeline 7 on PCM 4 using max 2 channels.
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# 1000us deadline on core 0 with priority 0
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PIPELINE_PCM_ADD(sof/pipe-eq-iir-volume-capture.m4,
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7, 5, 4, s32le,
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1000, 0, 0,
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48000, 48000, 48000)
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# DMIC16kHz passthrough capture pipeline 8 on PCM 5 using max 2 channels.
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# 1000us deadline on core 0 with priority 0
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PIPELINE_PCM_ADD(sof/pipe-eq-iir-volume-capture-16khz.m4,
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8, 6, 2, s16le,
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1000, 0, 0,
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16000, 16000, 16000)
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#
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# DAIs configuration
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#
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dnl DAI_ADD(pipeline,
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dnl pipe id, dai type, dai_index, dai_be,
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dnl buffer, periods, format,
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dnl deadline, priority, core, time_domain)
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# playback DAI is SSP5 using 2 periods
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# Buffers use s24le format, 1000us deadline on core 0 with priority 0
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DAI_ADD(sof/pipe-dai-playback.m4,
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1, SSP, 5, SSP5-Codec,
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PIPELINE_SOURCE_1, 2, s24le,
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1000, 0, 0, SSP_SCHEDULE_TIME_DOMAIN)
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# capture DAI is SSP5 using 2 periods
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# Buffers use s16le format, 1000us deadline on core 0 with priority 0
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DAI_ADD(sof/pipe-dai-capture.m4,
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6, SSP, 5, SSP5-Codec,
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PIPELINE_SINK_6, 2, s24le,
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1000, 0, 0, SSP_SCHEDULE_TIME_DOMAIN)
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# Media playback pipeline 5 on PCM 4 using max 2 channels of s16le.
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# Set 1000us deadline on core 0 with priority 0
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PIPELINE_PCM_ADD(sof/pipe-pcm-media.m4,
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5, 4, 2, s16le,
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1000, 0, 0,
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8000, 96000, FSYNC,
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SSP_SCHEDULE_TIME_DOMAIN,
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PIPELINE_PLAYBACK_SCHED_COMP_1)
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# Connect pipelines together
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SectionGraph."media-pipeline" {
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index "0"
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lines [
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dapm(PIPELINE_MIXER_1, PIPELINE_SOURCE_5)
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]
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}
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# capture DAI is DMIC using 2 periods
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# Buffers use s32le format, 1000us deadline on core 0 with priority 0
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DAI_ADD(sof/pipe-dai-capture.m4,
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7, DMIC, 0, dmic01,
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PIPELINE_SINK_7, 2, s32le,
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1000, 0, 0, SCHEDULE_TIME_DOMAIN_TIMER)
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# capture DAI is DMIC16kHz using 2 periods
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# Buffers use s16le format, 1000us deadline on core 0 with priority 0
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DAI_ADD(sof/pipe-dai-capture.m4,
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8, DMIC, 1, dmic16k,
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PIPELINE_SINK_8, 2, s16le,
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1000, 0, 0, SCHEDULE_TIME_DOMAIN_TIMER)
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# playback DAI is iDisp1 using 2 periods
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# Buffers use s32le format, 1000us deadline on core 0 with priority 0
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DAI_ADD(sof/pipe-dai-playback.m4,
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2, HDA, 0, iDisp1,
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PIPELINE_SOURCE_2, 2, s32le,
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1000, 0, 0, SCHEDULE_TIME_DOMAIN_TIMER)
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# playback DAI is iDisp2 using 2 periods
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# Buffers use s32le format, 1000us deadline on core 0 with priority 0
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DAI_ADD(sof/pipe-dai-playback.m4,
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3, HDA, 1, iDisp2,
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PIPELINE_SOURCE_3, 2, s32le,
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1000, 0, 0, SCHEDULE_TIME_DOMAIN_TIMER)
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# playback DAI is iDisp3 using 2 periods
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# Buffers use s32le format, 1000us deadline on core 0 with priority 0
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DAI_ADD(sof/pipe-dai-playback.m4,
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4, HDA, 2, iDisp3,
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PIPELINE_SOURCE_4, 2, s32le,
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1000, 0, 0, SCHEDULE_TIME_DOMAIN_TIMER)
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# PCM Low Latency, id 0
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dnl PCM_PLAYBACK_ADD(name, pcm_id, playback)
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PCM_DUPLEX_ADD(Port5, 0, PIPELINE_PCM_1, PIPELINE_PCM_6)
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PCM_PLAYBACK_ADD(HDMI1, 1, PIPELINE_PCM_2)
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PCM_PLAYBACK_ADD(HDMI2, 2, PIPELINE_PCM_3)
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PCM_PLAYBACK_ADD(HDMI3, 3, PIPELINE_PCM_4)
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PCM_CAPTURE_ADD(DMIC, 5, PIPELINE_PCM_7)
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PCM_CAPTURE_ADD(DMIC16kHz, 6, PIPELINE_PCM_8)
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#
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# BE configurations - overrides config in ACPI if present
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#
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dnl DAI_CONFIG(type, dai_index, link_id, name, ssp_config/dmic_config)
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#SSP 5 (ID: 0)
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ifdef(`CODEC_MASTER',
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`
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DAI_CONFIG(SSP, 5, 0, SSP5-Codec,
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SSP_CONFIG(I2S, SSP_CLOCK(mclk, 24576000, codec_mclk_in),
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SSP_CLOCK(bclk, eval(FSYNC * 64), codec_master),
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SSP_CLOCK(fsync, FSYNC, codec_master),
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SSP_TDM(2, 32, 3, 3),
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SSP_CONFIG_DATA(SSP, 5, 24)))
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'
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,
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`
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DAI_CONFIG(SSP, 5, 0, SSP5-Codec,
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SSP_CONFIG(I2S, SSP_CLOCK(mclk, 24576000, codec_mclk_in),
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SSP_CLOCK(bclk, 3072000, codec_slave),
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SSP_CLOCK(fsync, 48000, codec_slave),
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SSP_TDM(2, 32, 3, 3),
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SSP_CONFIG_DATA(SSP, 5, 24)))
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'
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)
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# DMIC (ID: 1)
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DAI_CONFIG(DMIC, 0, 1, dmic01,
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DMIC_CONFIG(1, 500000, 4800000, 40, 60, 48000,
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DMIC_WORD_LENGTH(s32le), 400, DMIC, 0,
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PDM_CONFIG(DMIC, 0, FOUR_CH_PDM0_PDM1)))
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# DMIC16kHz (ID: 2)
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DAI_CONFIG(DMIC, 1, 2, dmic16k,
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DMIC_CONFIG(1, 500000, 4800000, 40, 60, 16000,
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DMIC_WORD_LENGTH(s16le), 400, DMIC, 1,
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PDM_CONFIG(DMIC, 1, STEREO_PDM0)))
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# 3 HDMI/DP outputs (ID: 3,4,5)
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DAI_CONFIG(HDA, 0, 3, iDisp1,
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HDA_CONFIG(HDA_CONFIG_DATA(HDA, 0, 48000, 2)))
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DAI_CONFIG(HDA, 1, 4, iDisp2,
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HDA_CONFIG(HDA_CONFIG_DATA(HDA, 1, 48000, 2)))
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DAI_CONFIG(HDA, 2, 5, iDisp3,
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HDA_CONFIG(HDA_CONFIG_DATA(HDA, 2, 48000, 2)))
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DEBUG_END
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