sof/tools/topology/sof-apl-pcm512x.m4

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#
# Topology for generic Apollolake UP^2 with pcm512x codec and HDMI.
#
# Include topology builder
include(`utils.m4')
include(`dai.m4')
include(`pipeline.m4')
include(`ssp.m4')
include(`hda.m4')
# Include TLV library
include(`common/tlv.m4')
# Include Token library
include(`sof/tokens.m4')
# Include Apollolake DSP configuration
include(`platform/intel/bxt.m4')
include(`platform/intel/dmic.m4')
ifdef(`CODEC_MASTER',
define(SSP_SCHEDULE_TIME_DOMAIN, SCHEDULE_TIME_DOMAIN_DMA),
define(SSP_SCHEDULE_TIME_DOMAIN, SCHEDULE_TIME_DOMAIN_TIMER))
DEBUG_START
#
# Define the pipelines
#
# PCM0 <---> volume <----> SSP5 (pcm512x)
# PCM1 ----> volume -----> iDisp1
# PCM2 ----> volume -----> iDisp2
# PCM3 ----> volume -----> iDisp3
# PCM4 ----> volume -----> Media Playback 4
# PCM5 <------------------ DMIC0 (DMIC)
# PCM6 <------------------ DMIC1 (DMIC16kHz)
#
dnl PIPELINE_PCM_ADD(pipeline,
dnl pipe id, pcm, max channels, format,
dnl period, priority, core,
dnl pcm_min_rate, pcm_max_rate, pipeline_rate,
dnl time_domain, sched_comp)
# Low Latency playback pipeline 1 on PCM 0 using max 2 channels of s32le.
# Set 1000us deadline on core 0 with priority 0
PIPELINE_PCM_ADD(sof/pipe-low-latency-playback.m4,
1, 0, 2, s32le,
1000, 0, 0,
FSYNC, FSYNC, FSYNC)
# Low Latency capture pipeline 2 on PCM 0 using max 2 channels of s32le.
# 1000us deadline on core 0 with priority 0
PIPELINE_PCM_ADD(sof/pipe-volume-capture.m4,
6, 0, 2, s32le,
1000, 0, 0,
FSYNC, FSYNC, FSYNC)
# Low Latency playback pipeline 2 on PCM 1 using max 2 channels of s32le.
# 1000us deadline on core 0 with priority 0
PIPELINE_PCM_ADD(sof/pipe-volume-playback.m4,
2, 1, 2, s32le,
1000, 0, 0,
48000, 48000, 48000)
# Low Latency playback pipeline 3 on PCM 2 using max 2 channels of s32le.
# 1000us deadline on core 0 with priority 0
PIPELINE_PCM_ADD(sof/pipe-volume-playback.m4,
3, 2, 2, s32le,
1000, 0, 0,
48000, 48000, 48000)
# Low Latency playback pipeline 4 on PCM 3 using max 2 channels of s32le.
# 1000us deadline on core 0 with priority 0
PIPELINE_PCM_ADD(sof/pipe-volume-playback.m4,
4, 3, 2, s32le,
1000, 0, 0,
48000, 48000, 48000)
# DMIC passthrough capture pipeline 7 on PCM 4 using max 2 channels.
# 1000us deadline on core 0 with priority 0
PIPELINE_PCM_ADD(sof/pipe-eq-iir-volume-capture.m4,
7, 5, 4, s32le,
1000, 0, 0,
48000, 48000, 48000)
# DMIC16kHz passthrough capture pipeline 8 on PCM 5 using max 2 channels.
# 1000us deadline on core 0 with priority 0
PIPELINE_PCM_ADD(sof/pipe-eq-iir-volume-capture-16khz.m4,
8, 6, 2, s16le,
1000, 0, 0,
16000, 16000, 16000)
#
# DAIs configuration
#
dnl DAI_ADD(pipeline,
dnl pipe id, dai type, dai_index, dai_be,
dnl buffer, periods, format,
dnl deadline, priority, core, time_domain)
# playback DAI is SSP5 using 2 periods
# Buffers use s24le format, 1000us deadline on core 0 with priority 0
DAI_ADD(sof/pipe-dai-playback.m4,
1, SSP, 5, SSP5-Codec,
PIPELINE_SOURCE_1, 2, s24le,
1000, 0, 0, SSP_SCHEDULE_TIME_DOMAIN)
# capture DAI is SSP5 using 2 periods
# Buffers use s16le format, 1000us deadline on core 0 with priority 0
DAI_ADD(sof/pipe-dai-capture.m4,
6, SSP, 5, SSP5-Codec,
PIPELINE_SINK_6, 2, s24le,
1000, 0, 0, SSP_SCHEDULE_TIME_DOMAIN)
# Media playback pipeline 5 on PCM 4 using max 2 channels of s16le.
# Set 1000us deadline on core 0 with priority 0
PIPELINE_PCM_ADD(sof/pipe-pcm-media.m4,
5, 4, 2, s16le,
1000, 0, 0,
8000, 96000, FSYNC,
SSP_SCHEDULE_TIME_DOMAIN,
PIPELINE_PLAYBACK_SCHED_COMP_1)
# Connect pipelines together
SectionGraph."media-pipeline" {
index "0"
lines [
dapm(PIPELINE_MIXER_1, PIPELINE_SOURCE_5)
]
}
# capture DAI is DMIC using 2 periods
# Buffers use s32le format, 1000us deadline on core 0 with priority 0
DAI_ADD(sof/pipe-dai-capture.m4,
7, DMIC, 0, dmic01,
PIPELINE_SINK_7, 2, s32le,
1000, 0, 0, SCHEDULE_TIME_DOMAIN_TIMER)
# capture DAI is DMIC16kHz using 2 periods
# Buffers use s16le format, 1000us deadline on core 0 with priority 0
DAI_ADD(sof/pipe-dai-capture.m4,
8, DMIC, 1, dmic16k,
PIPELINE_SINK_8, 2, s16le,
1000, 0, 0, SCHEDULE_TIME_DOMAIN_TIMER)
# playback DAI is iDisp1 using 2 periods
# Buffers use s32le format, 1000us deadline on core 0 with priority 0
DAI_ADD(sof/pipe-dai-playback.m4,
2, HDA, 0, iDisp1,
PIPELINE_SOURCE_2, 2, s32le,
1000, 0, 0, SCHEDULE_TIME_DOMAIN_TIMER)
# playback DAI is iDisp2 using 2 periods
# Buffers use s32le format, 1000us deadline on core 0 with priority 0
DAI_ADD(sof/pipe-dai-playback.m4,
3, HDA, 1, iDisp2,
PIPELINE_SOURCE_3, 2, s32le,
1000, 0, 0, SCHEDULE_TIME_DOMAIN_TIMER)
# playback DAI is iDisp3 using 2 periods
# Buffers use s32le format, 1000us deadline on core 0 with priority 0
DAI_ADD(sof/pipe-dai-playback.m4,
4, HDA, 2, iDisp3,
PIPELINE_SOURCE_4, 2, s32le,
1000, 0, 0, SCHEDULE_TIME_DOMAIN_TIMER)
# PCM Low Latency, id 0
dnl PCM_PLAYBACK_ADD(name, pcm_id, playback)
PCM_DUPLEX_ADD(Port5, 0, PIPELINE_PCM_1, PIPELINE_PCM_6)
PCM_PLAYBACK_ADD(HDMI1, 1, PIPELINE_PCM_2)
PCM_PLAYBACK_ADD(HDMI2, 2, PIPELINE_PCM_3)
PCM_PLAYBACK_ADD(HDMI3, 3, PIPELINE_PCM_4)
PCM_CAPTURE_ADD(DMIC, 5, PIPELINE_PCM_7)
PCM_CAPTURE_ADD(DMIC16kHz, 6, PIPELINE_PCM_8)
#
# BE configurations - overrides config in ACPI if present
#
dnl DAI_CONFIG(type, dai_index, link_id, name, ssp_config/dmic_config)
#SSP 5 (ID: 0)
ifdef(`CODEC_MASTER',
`
DAI_CONFIG(SSP, 5, 0, SSP5-Codec,
SSP_CONFIG(I2S, SSP_CLOCK(mclk, 24576000, codec_mclk_in),
SSP_CLOCK(bclk, eval(FSYNC * 64), codec_master),
SSP_CLOCK(fsync, FSYNC, codec_master),
SSP_TDM(2, 32, 3, 3),
SSP_CONFIG_DATA(SSP, 5, 24)))
'
,
`
DAI_CONFIG(SSP, 5, 0, SSP5-Codec,
SSP_CONFIG(I2S, SSP_CLOCK(mclk, 24576000, codec_mclk_in),
SSP_CLOCK(bclk, 3072000, codec_slave),
SSP_CLOCK(fsync, 48000, codec_slave),
SSP_TDM(2, 32, 3, 3),
SSP_CONFIG_DATA(SSP, 5, 24)))
'
)
# DMIC (ID: 1)
DAI_CONFIG(DMIC, 0, 1, dmic01,
DMIC_CONFIG(1, 500000, 4800000, 40, 60, 48000,
DMIC_WORD_LENGTH(s32le), 400, DMIC, 0,
PDM_CONFIG(DMIC, 0, FOUR_CH_PDM0_PDM1)))
# DMIC16kHz (ID: 2)
DAI_CONFIG(DMIC, 1, 2, dmic16k,
DMIC_CONFIG(1, 500000, 4800000, 40, 60, 16000,
DMIC_WORD_LENGTH(s16le), 400, DMIC, 1,
PDM_CONFIG(DMIC, 1, STEREO_PDM0)))
# 3 HDMI/DP outputs (ID: 3,4,5)
DAI_CONFIG(HDA, 0, 3, iDisp1,
HDA_CONFIG(HDA_CONFIG_DATA(HDA, 0, 48000, 2)))
DAI_CONFIG(HDA, 1, 4, iDisp2,
HDA_CONFIG(HDA_CONFIG_DATA(HDA, 1, 48000, 2)))
DAI_CONFIG(HDA, 2, 5, iDisp3,
HDA_CONFIG(HDA_CONFIG_DATA(HDA, 2, 48000, 2)))
DEBUG_END